Merge git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86
* git://git.kernel.org/pub/scm/linux/kernel/git/x86/linux-2.6-x86: x86: fix asm-x86/msr.h for user-space export x86: fix asm-x86/byteorder.h for userspace export
This commit is contained in:
Linus Torvalds
commit
ef5fa1b191
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@ -30,13 +30,13 @@ static __inline__ __attribute_const__ __u64 ___arch__swab64(__u64 val)
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} v;
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v.u = val;
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#ifdef CONFIG_X86_BSWAP
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asm("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
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__asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1"
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: "=r" (v.s.a), "=r" (v.s.b)
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: "0" (v.s.a), "1" (v.s.b));
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#else
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v.s.a = ___arch__swab32(v.s.a);
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v.s.b = ___arch__swab32(v.s.b);
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asm("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b));
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__asm__("xchgl %0,%1" : "=r" (v.s.a), "=r" (v.s.b) : "0" (v.s.a), "1" (v.s.b));
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#endif
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return v.u;
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}
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@ -191,38 +191,6 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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#define wrmsrl(msr,val) wrmsr(msr,(__u32)((__u64)(val)),((__u64)(val))>>32)
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/* wrmsr with exception handling */
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#define wrmsr_safe(msr,a,b) ({ int ret__; \
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asm volatile("2: wrmsr ; xorl %0,%0\n" \
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"1:\n\t" \
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".section .fixup,\"ax\"\n\t" \
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"3: movl %4,%0 ; jmp 1b\n\t" \
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".previous\n\t" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n\t" \
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" .quad 2b,3b\n\t" \
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".previous" \
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: "=a" (ret__) \
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: "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \
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ret__; })
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#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
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#define rdmsr_safe(msr,a,b) \
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({ int ret__; \
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asm volatile ("1: rdmsr\n" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl %4,%0\n" \
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" jmp 2b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n" \
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" .quad 1b,3b\n" \
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".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b)) \
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:"c"(msr), "i"(-EIO), "0"(0)); \
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ret__; })
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#define rdtsc(low,high) \
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__asm__ __volatile__("rdtsc" : "=a" (low), "=d" (high))
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@ -230,17 +198,17 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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__asm__ __volatile__ ("rdtsc" : "=a" (low) : : "edx")
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#define rdtscp(low,high,aux) \
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asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux))
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__asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (low), "=d" (high), "=c" (aux))
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#define rdtscll(val) do { \
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unsigned int __a,__d; \
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asm volatile("rdtsc" : "=a" (__a), "=d" (__d)); \
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__asm__ __volatile__("rdtsc" : "=a" (__a), "=d" (__d)); \
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(val) = ((unsigned long)__a) | (((unsigned long)__d)<<32); \
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} while(0)
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#define rdtscpll(val, aux) do { \
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unsigned long __a, __d; \
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asm volatile (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \
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__asm__ __volatile__ (".byte 0x0f,0x01,0xf9" : "=a" (__a), "=d" (__d), "=c" (aux)); \
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(val) = (__d << 32) | __a; \
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} while (0)
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@ -253,6 +221,7 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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: "=a" (low), "=d" (high) \
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: "c" (counter))
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static inline void cpuid(int op, unsigned int *eax, unsigned int *ebx,
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unsigned int *ecx, unsigned int *edx)
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{
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@ -320,6 +289,40 @@ static inline unsigned int cpuid_edx(unsigned int op)
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return edx;
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}
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#ifdef __KERNEL__
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/* wrmsr with exception handling */
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#define wrmsr_safe(msr,a,b) ({ int ret__; \
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asm volatile("2: wrmsr ; xorl %0,%0\n" \
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"1:\n\t" \
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".section .fixup,\"ax\"\n\t" \
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"3: movl %4,%0 ; jmp 1b\n\t" \
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".previous\n\t" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n\t" \
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" .quad 2b,3b\n\t" \
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".previous" \
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: "=a" (ret__) \
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: "c" (msr), "0" (a), "d" (b), "i" (-EFAULT)); \
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ret__; })
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#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
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#define rdmsr_safe(msr,a,b) \
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({ int ret__; \
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asm volatile ("1: rdmsr\n" \
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"2:\n" \
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".section .fixup,\"ax\"\n" \
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"3: movl %4,%0\n" \
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" jmp 2b\n" \
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".previous\n" \
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".section __ex_table,\"a\"\n" \
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" .align 8\n" \
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" .quad 1b,3b\n" \
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".previous":"=&bDS" (ret__), "=a"(*(a)), "=d"(*(b)) \
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:"c"(msr), "i"(-EIO), "0"(0)); \
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ret__; })
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#ifdef CONFIG_SMP
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void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
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void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
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@ -343,6 +346,7 @@ static inline int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
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return wrmsr_safe(msr_no, l, h);
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}
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#endif /* CONFIG_SMP */
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#endif /* __KERNEL__ */
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#endif /* __ASSEMBLY__ */
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#endif /* !__i386__ */
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