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Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6

This commit is contained in:
David Woodhouse 2007-04-26 09:31:28 +01:00
parent 06d63cc51d de46c33745
commit ef2e58ea6b
878 changed files with 8860 additions and 9392 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
.mailmap
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@ -67,6 +67,8 @@ Koushik <raghavendra.koushik@neterion.com>
Leonid I Ananiev <leonid.i.ananiev@intel.com>
Linas Vepstas <linas@austin.ibm.com>
Matthieu CASTET <castet.matthieu@free.fr>
Michael Buesch <mb@bu3sch.de>
Michael Buesch <mbuesch@freenet.de>
Michel Dänzer <michel@tungstengraphics.com>
Mitesh shah <mshah@teja.com>
Morten Welinder <terra@gnome.org>

9
Documentation/ABI/obsolete/dv1394 Normal file
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@ -0,0 +1,9 @@
What: dv1394 (a.k.a. "OHCI-DV I/O support" for FireWire)
Contact: linux1394-devel@lists.sourceforge.net
Description:
New application development should use raw1394 + userspace libraries
instead, notably libiec61883 which is functionally equivalent.
Users:
ffmpeg/libavformat (used by a variety of media players)
dvgrab v1.x (replaced by dvgrab2 on top of raw1394 and resp. libraries)

3
Documentation/cpusets.txt
View File

@ -557,6 +557,9 @@ Set some flags:
Add some cpus:
# /bin/echo 0-7 > cpus
Add some mems:
# /bin/echo 0-7 > mems
Now attach your shell to this cpuset:
# /bin/echo $$ > tasks

2
Documentation/crypto/api-intro.txt
View File

@ -60,7 +60,7 @@ Here's an example of how to use the API:
desc.tfm = tfm;
desc.flags = 0;
if (crypto_hash_digest(&desc, &sg, 2, result))
if (crypto_hash_digest(&desc, sg, 2, result))
fail();
crypto_free_hash(tfm);

19
Documentation/feature-removal-schedule.txt
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@ -39,17 +39,6 @@ Who: Dan Dennedy <dan@dennedy.org>, Stefan Richter <stefanr@s5r6.in-berlin.de>
---------------------------
What: dv1394 driver (CONFIG_IEEE1394_DV1394)
When: June 2007
Why: Replaced by raw1394 + userspace libraries, notably libiec61883. This
shift of application support has been indicated on www.linux1394.org
and developers' mailinglists for quite some time. Major applications
have been converted, with the exception of ffmpeg and hence xine.
Piped output of dvgrab2 is a partial equivalent to dv1394.
Who: Dan Dennedy <dan@dennedy.org>, Stefan Richter <stefanr@s5r6.in-berlin.de>
---------------------------
What: Video4Linux API 1 ioctls and video_decoder.h from Video devices.
When: December 2006
Why: V4L1 AP1 was replaced by V4L2 API. during migration from 2.4 to 2.6
@ -316,3 +305,11 @@ Why: The option/code is
Who: Johannes Berg <johannes@sipsolutions.net>
---------------------------
What: i8xx_tco watchdog driver
When: in 2.6.22
Why: the i8xx_tco watchdog driver has been replaced by the iTCO_wdt
watchdog driver.
Who: Wim Van Sebroeck <wim@iguana.be>
---------------------------

36
Documentation/gpio.txt
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@ -27,7 +27,7 @@ The exact capabilities of GPIOs vary between systems. Common options:
- Output values are writable (high=1, low=0). Some chips also have
options about how that value is driven, so that for example only one
value might be driven ... supporting "wire-OR" and similar schemes
for the other value.
for the other value (notably, "open drain" signaling).
- Input values are likewise readable (1, 0). Some chips support readback
of pins configured as "output", which is very useful in such "wire-OR"
@ -105,12 +105,15 @@ setting up a platform_device using the GPIO, is mark its direction:
/* set as input or output, returning 0 or negative errno */
int gpio_direction_input(unsigned gpio);
int gpio_direction_output(unsigned gpio);
int gpio_direction_output(unsigned gpio, int value);
The return value is zero for success, else a negative errno. It should
be checked, since the get/set calls don't have error returns and since
misconfiguration is possible. (These calls could sleep.)
For output GPIOs, the value provided becomes the initial output value.
This helps avoid signal glitching during system startup.
Setting the direction can fail if the GPIO number is invalid, or when
that particular GPIO can't be used in that mode. It's generally a bad
idea to rely on boot firmware to have set the direction correctly, since
@ -244,6 +247,35 @@ with gpio_get_value(), for example to initialize or update driver state
when the IRQ is edge-triggered.
Emulating Open Drain Signals
----------------------------
Sometimes shared signals need to use "open drain" signaling, where only the
low signal level is actually driven. (That term applies to CMOS transistors;
"open collector" is used for TTL.) A pullup resistor causes the high signal
level. This is sometimes called a "wire-AND"; or more practically, from the
negative logic (low=true) perspective this is a "wire-OR".
One common example of an open drain signal is a shared active-low IRQ line.
Also, bidirectional data bus signals sometimes use open drain signals.
Some GPIO controllers directly support open drain outputs; many don't. When
you need open drain signaling but your hardware doesn't directly support it,
there's a common idiom you can use to emulate it with any GPIO pin that can
be used as either an input or an output:
LOW: gpio_direction_output(gpio, 0) ... this drives the signal
and overrides the pullup.
HIGH: gpio_direction_input(gpio) ... this turns off the output,
so the pullup (or some other device) controls the signal.
If you are "driving" the signal high but gpio_get_value(gpio) reports a low
value (after the appropriate rise time passes), you know some other component
is driving the shared signal low. That's not necessarily an error. As one
common example, that's how I2C clocks are stretched: a slave that needs a
slower clock delays the rising edge of SCK, and the I2C master adjusts its
signaling rate accordingly.
What do these conventions omit?
===============================

11
Documentation/kernel-parameters.txt
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@ -138,6 +138,12 @@ and is between 256 and 4096 characters. It is defined in the file
See also Documentation/pm.txt, pci=noacpi
acpi_apic_instance= [ACPI, IOAPIC]
Format: <int>
2: use 2nd APIC table, if available
1,0: use 1st APIC table
default: 0
acpi_sleep= [HW,ACPI] Sleep options
Format: { s3_bios, s3_mode }
See Documentation/power/video.txt
@ -774,6 +780,9 @@ and is between 256 and 4096 characters. It is defined in the file
lapic [IA-32,APIC] Enable the local APIC even if BIOS
disabled it.
lapic_timer_c2_ok [IA-32,x86-64,APIC] trust the local apic timer in
C2 power state.
lasi= [HW,SCSI] PARISC LASI driver for the 53c700 chip
Format: addr:<io>,irq:<irq>
@ -1117,6 +1126,8 @@ and is between 256 and 4096 characters. It is defined in the file
nolapic [IA-32,APIC] Do not enable or use the local APIC.
nolapic_timer [IA-32,APIC] Do not use the local APIC timer.
noltlbs [PPC] Do not use large page/tlb entries for kernel
lowmem mapping on PPC40x.

18
Documentation/networking/ax25.txt
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@ -1,16 +1,10 @@
To use the amateur radio protocols within Linux you will need to get a
suitable copy of the AX.25 Utilities. More detailed information about these
and associated programs can be found on http://zone.pspt.fi/~jsn/.
For more information about the AX.25, NET/ROM and ROSE protocol stacks, see
the AX25-HOWTO written by Terry Dawson <terry@perf.no.itg.telstra.com.au>
who is also the AX.25 Utilities maintainer.
suitable copy of the AX.25 Utilities. More detailed information about
AX.25, NET/ROM and ROSE, associated programs and and utilities can be
found on http://www.linux-ax25.org.
There is an active mailing list for discussing Linux amateur radio matters
called linux-hams. To subscribe to it, send a message to
called linux-hams@vger.kernel.org. To subscribe to it, send a message to
majordomo@vger.kernel.org with the words "subscribe linux-hams" in the body
of the message, the subject field is ignored.
Jonathan G4KLX
g4klx@g4klx.demon.co.uk
of the message, the subject field is ignored. You don't need to be
subscribed to post but of course that means you might miss an answer.

9
Documentation/networking/ip-sysctl.txt
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@ -851,6 +851,15 @@ accept_redirects - BOOLEAN
Functional default: enabled if local forwarding is disabled.
disabled if local forwarding is enabled.
accept_source_route - INTEGER
Accept source routing (routing extension header).
> 0: Accept routing header.
= 0: Accept only routing header type 2.
< 0: Do not accept routing header.
Default: 0
autoconf - BOOLEAN
Autoconfigure addresses using Prefix Information in Router
Advertisements.

17
Documentation/power/pci.txt
View File

@ -102,31 +102,28 @@ pci_save_state
--------------
Usage:
pci_save_state(dev, buffer);
pci_save_state(struct pci_dev *dev);
Description:
Save first 64 bytes of PCI config space. Buffer must be allocated by
caller.
Save first 64 bytes of PCI config space, along with any additional
PCI-Express or PCI-X information.
pci_restore_state
-----------------
Usage:
pci_restore_state(dev, buffer);
pci_restore_state(struct pci_dev *dev);
Description:
Restore previously saved config space. (First 64 bytes only);
If buffer is NULL, then restore what information we know about the
device from bootup: BARs and interrupt line.
Restore previously saved config space.
pci_set_power_state
-------------------
Usage:
pci_set_power_state(dev, state);
pci_set_power_state(struct pci_dev *dev, pci_power_t state);
Description:
Transition device to low power state using PCI PM Capabilities
@ -142,7 +139,7 @@ pci_enable_wake
---------------
Usage:
pci_enable_wake(dev, state, enable);
pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable);
Description:
Enable device to generate PME# during low power state using PCI PM

4
Documentation/sound/alsa/ALSA-Configuration.txt
View File

@ -866,6 +866,7 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
basic 3-jack (default)
hp HP nx6320
thinkpad Lenovo Thinkpad T60/X60/Z60
toshiba Toshiba U205
AD1986A
6stack 6-jack, separate surrounds (default)
@ -906,7 +907,8 @@ Prior to version 0.9.0rc4 options had a 'snd_' prefix. This was removed.
5stack D945 5stack + SPDIF
macmini Intel Mac Mini
macbook Intel Mac Book
macbook-pro Intel Mac Book Pro
macbook-pro-v1 Intel Mac Book Pro 1st generation
macbook-pro Intel Mac Book Pro 2nd generation
STAC9202/9250/9251
ref Reference board, base config

2
Documentation/sysrq.txt
View File

@ -93,6 +93,8 @@ On all - write a character to /proc/sysrq-trigger. e.g.:
'p' - Will dump the current registers and flags to your console.
'q' - Will dump a list of all running timers.
'r' - Turns off keyboard raw mode and sets it to XLATE.
's' - Will attempt to sync all mounted filesystems.

4
Documentation/x86_64/boot-options.txt
View File

@ -293,7 +293,3 @@ Debugging
stuck (default)
Miscellaneous
noreplacement Don't replace instructions with more appropriate ones
for the CPU. This may be useful on asymmetric MP systems
where some CPUs have less capabilities than others.

75
MAINTAINERS
View File

@ -198,10 +198,25 @@ L: linux-sound@vger.kernel.org
W: http://www.stud.uni-karlsruhe.de/~uh1b/
S: Maintained
IPS SCSI RAID DRIVER
P: Adaptec OEM Raid Solutions
M: aacraid@adaptec.com
L: linux-scsi@vger.kernel.org
W: http://www.adaptec.com/
S: Maintained
DPT_I2O SCSI RAID DRIVER
P: Adaptec OEM Raid Solutions
M: aacraid@adaptec.com
L: linux-scsi@vger.kernel.org
W: http://www.adaptec.com/
S: Maintained
AACRAID SCSI RAID DRIVER
P: Adaptec OEM Raid Solutions
M: aacraid@adaptec.com
L: linux-scsi@vger.kernel.org
W: http://linux.dell.com/storage.shtml
W: http://www.adaptec.com/
S: Supported
ACPI
@ -1303,7 +1318,7 @@ S: Maintained
ETHERNET BRIDGE
P: Stephen Hemminger
M: shemminger@linux-foundation.org
L: bridge@lists.osdl.org
L: bridge@lists.linux-foundation.org
W: http://bridge.sourceforge.net/
S: Maintained
@ -1340,6 +1355,11 @@ M: kevin.curtis@farsite.co.uk
W: http://www.farsite.co.uk/
S: Supported
FAULT INJECTION SUPPORT
P: Akinobu Mita
M: akinobu.mita@gmail.com
S: Supported
FRAMEBUFFER LAYER
P: Antonino Daplas
M: adaplas@gmail.com
@ -1389,7 +1409,7 @@ M: hch@infradead.org
W: ftp://ftp.openlinux.org/pub/people/hch/vxfs
S: Maintained
FUJITSU FR-V PORT
FUJITSU FR-V (FRV) PORT
P: David Howells
M: dhowells@redhat.com
S: Maintained
@ -1585,12 +1605,6 @@ L: i2c@lm-sensors.org
T: quilt http://khali.linux-fr.org/devel/linux-2.6/jdelvare-i2c/
S: Maintained
I2O
P: Markus Lidel
M: markus.lidel@shadowconnect.com
W: http://i2o.shadowconnect.com/
S: Maintained
i386 BOOT CODE
P: Riley H. Williams
M: Riley@Williams.Name
@ -1681,7 +1695,7 @@ S: Maintained
IEEE 1394 SUBSYSTEM
P: Ben Collins
M: bcollins@debian.org
M: ben.collins@ubuntu.com
P: Stefan Richter
M: stefanr@s5r6.in-berlin.de
L: linux1394-devel@lists.sourceforge.net
@ -1689,25 +1703,11 @@ W: http://www.linux1394.org/
T: git kernel.org:/pub/scm/linux/kernel/git/ieee1394/linux1394-2.6.git
S: Maintained
IEEE 1394 IPV4 DRIVER (eth1394)
P: Stefan Richter
M: stefanr@s5r6.in-berlin.de
L: linux1394-devel@lists.sourceforge.net
S: Odd Fixes
IEEE 1394 PCILYNX DRIVER
P: Jody McIntyre
M: scjody@modernduck.com
P: Stefan Richter
M: stefanr@s5r6.in-berlin.de
L: linux1394-devel@lists.sourceforge.net
S: Odd Fixes
IEEE 1394 RAW I/O DRIVER
P: Ben Collins
M: bcollins@debian.org
IEEE 1394 RAW I/O DRIVER (raw1394)
P: Dan Dennedy
M: dan@dennedy.org
P: Stefan Richter
M: stefanr@s5r6.in-berlin.de
L: linux1394-devel@lists.sourceforge.net
S: Maintained
@ -1942,7 +1942,7 @@ P: Vivek Goyal
M: vgoyal@in.ibm.com
P: Haren Myneni
M: hbabu@us.ibm.com
L: fastboot@lists.osdl.org
L: fastboot@lists.linux-foundation.org
L: linux-kernel@vger.kernel.org
W: http://lse.sourceforge.net/kdump/
S: Maintained
@ -1969,7 +1969,7 @@ S: Maintained
KERNEL JANITORS
P: Several
L: kernel-janitors@lists.osdl.org
L: kernel-janitors@lists.linux-foundation.org
W: http://www.kerneljanitors.org/
S: Maintained
@ -1992,7 +1992,7 @@ P: Eric Biederman
M: ebiederm@xmission.com
W: http://www.xmission.com/~ebiederm/files/kexec/
L: linux-kernel@vger.kernel.org
L: fastboot@lists.osdl.org
L: fastboot@lists.linux-foundation.org
S: Maintained
KPROBES
@ -2330,7 +2330,7 @@ S: Maintained
NETEM NETWORK EMULATOR
P: Stephen Hemminger
M: shemminger@linux-foundation.org
L: netem@lists.osdl.org
L: netem@lists.linux-foundation.org
S: Maintained
NETFILTER/IPTABLES/IPCHAINS
@ -2928,9 +2928,12 @@ L: linux-scsi@vger.kernel.org
S: Maintained
SCTP PROTOCOL
P: Vlad Yasevich
M: vladislav.yasevich@hp.com
P: Sridhar Samudrala
M: sri@us.ibm.com
L: lksctp-developers@lists.sourceforge.net
W: http://lksctp.sourceforge.net
S: Supported
SCx200 CPU SUPPORT
@ -3056,7 +3059,7 @@ S: Supported
SOFTWARE SUSPEND:
P: Pavel Machek
M: pavel@suse.cz
L: linux-pm@lists.osdl.org
L: linux-pm@lists.linux-foundation.org
S: Maintained
SONIC NETWORK DRIVER
@ -3066,11 +3069,10 @@ L: netdev@vger.kernel.org
S: Maintained
SONY VAIO CONTROL DEVICE DRIVER
P: Stelian Pop
M: stelian@popies.net
P: Mattia Dongili
M: malattia@linux.it
W: http://popies.net/sonypi/
L: linux-acpi@vger.kernel.org
W: http://www.linux.it/~malattia/wiki/index.php/Sony_drivers
S: Maintained
SOUND
@ -3103,6 +3105,9 @@ TPM DEVICE DRIVER
P: Kylene Hall
M: kjhall@us.ibm.com
W: http://tpmdd.sourceforge.net
P: Marcel Selhorst
M: tpm@selhorst.net
W: http://www.prosec.rub.de/tpm/
L: tpmdd-devel@lists.sourceforge.net
S: Maintained

4
Makefile
View File

@ -1,8 +1,8 @@
VERSION = 2
PATCHLEVEL = 6
SUBLEVEL = 21
EXTRAVERSION = -rc3
NAME = Homicidal Dwarf Hamster
EXTRAVERSION =
NAME = Nocturnal Monster Puppy
# *DOCUMENTATION*
# To see a list of typical targets execute "make help"

2
arch/alpha/kernel/core_mcpcia.c
View File

@ -40,8 +40,6 @@
# define DBG_CFG(args)
#endif
#define MCPCIA_MAX_HOSES 4
/*
* Given a bus, device, and function number, compute resulting
* configuration space address and setup the MCPCIA_HAXR2 register

1
arch/alpha/kernel/err_titan.c
View File

@ -16,6 +16,7 @@
#include <asm/smp.h>
#include <asm/err_common.h>
#include <asm/err_ev6.h>
#include <asm/irq_regs.h>
#include "err_impl.h"
#include "proto.h"

8
arch/alpha/kernel/module.c
View File

@ -285,12 +285,12 @@ apply_relocate_add(Elf64_Shdr *sechdrs, const char *strtab,
reloc_overflow:
if (ELF64_ST_TYPE (sym->st_info) == STT_SECTION)
printk(KERN_ERR
"module %s: Relocation overflow vs section %d\n",
me->name, sym->st_shndx);
"module %s: Relocation (type %lu) overflow vs section %d\n",
me->name, r_type, sym->st_shndx);
else
printk(KERN_ERR
"module %s: Relocation overflow vs %s\n",
me->name, strtab + sym->st_name);
"module %s: Relocation (type %lu) overflow vs %s\n",
me->name, r_type, strtab + sym->st_name);
return -ENOEXEC;
}
}

6
arch/alpha/kernel/sys_nautilus.c
View File

@ -70,6 +70,12 @@ nautilus_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
/* Preserve the IRQ set up by the console. */
u8 irq;
/* UP1500: AGP INTA is actually routed to IRQ 5, not IRQ 10 as
console reports. Check the device id of AGP bridge to distinguish
UP1500 from UP1000/1100. Note: 'pin' is 2 due to bridge swizzle. */
if (slot == 1 && pin == 2 &&
dev->bus->self && dev->bus->self->device == 0x700f)
return 5;
pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
return irq;
}

9
arch/alpha/kernel/sys_noritake.c
View File

@ -66,6 +66,13 @@ noritake_startup_irq(unsigned int irq)
return 0;
}
static void
noritake_end_irq(unsigned int irq)
{
if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
noritake_enable_irq(irq);
}
static struct hw_interrupt_type noritake_irq_type = {
.typename = "NORITAKE",
.startup = noritake_startup_irq,
@ -73,7 +80,7 @@ static struct hw_interrupt_type noritake_irq_type = {
.enable = noritake_enable_irq,
.disable = noritake_disable_irq,
.ack = noritake_disable_irq,
.end = noritake_enable_irq,
.end = noritake_end_irq,
};
static void

15
arch/alpha/kernel/sys_rawhide.c
View File

@ -52,6 +52,9 @@ rawhide_update_irq_hw(int hose, int mask)
*(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose));
}
#define hose_exists(h) \
(((h) < MCPCIA_MAX_HOSES) && (cached_irq_masks[(h)] != 0))
static inline void
rawhide_enable_irq(unsigned int irq)
{
@ -59,6 +62,9 @@ rawhide_enable_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24;
mask = 1 << irq;
@ -76,6 +82,9 @@ rawhide_disable_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24;
mask = ~(1 << irq) | hose_irq_masks[hose];
@ -93,6 +102,9 @@ rawhide_mask_and_ack_irq(unsigned int irq)
irq -= 16;
hose = irq / 24;
if (!hose_exists(hose)) /* if hose non-existent, exit */
return;
irq -= hose * 24;
mask1 = 1 << irq;
mask = ~mask1 | hose_irq_masks[hose];
@ -169,6 +181,9 @@ rawhide_init_irq(void)
mcpcia_init_hoses();
/* Clear them all; only hoses that exist will be non-zero. */
for (i = 0; i < MCPCIA_MAX_HOSES; i++) cached_irq_masks[i] = 0;
for (hose = hose_head; hose; hose = hose->next) {
unsigned int h = hose->index;
unsigned int mask = hose_irq_masks[h];

14
arch/alpha/kernel/sys_sio.c
View File

@ -84,12 +84,16 @@ alphabook1_init_arch(void)
static void __init
sio_pci_route(void)
{
#if defined(ALPHA_RESTORE_SRM_SETUP)
/* First, read and save the original setting. */
unsigned int orig_route_tab;
/* First, ALWAYS read and print the original setting. */
pci_bus_read_config_dword(pci_isa_hose->bus, PCI_DEVFN(7, 0), 0x60,
&saved_config.orig_route_tab);
&orig_route_tab);
printk("%s: PIRQ original 0x%x new 0x%x\n", __FUNCTION__,
saved_config.orig_route_tab, alpha_mv.sys.sio.route_tab);
orig_route_tab, alpha_mv.sys.sio.route_tab);
#if defined(ALPHA_RESTORE_SRM_SETUP)
saved_config.orig_route_tab = orig_route_tab;
#endif
/* Now override with desired setting. */
@ -334,7 +338,7 @@ struct alpha_machine_vector avanti_mv __initmv = {
.pci_swizzle = common_swizzle,
.sys = { .sio = {
.route_tab = 0x0b0a0e0f,
.route_tab = 0x0b0a050f, /* leave 14 for IDE, 9 for SND */
}}
};
ALIAS_MV(avanti)

2
arch/alpha/kernel/sys_sx164.c
View File

@ -132,7 +132,7 @@ sx164_init_arch(void)
if (amask(AMASK_MAX) != 0
&& alpha_using_srm
&& (cpu->pal_revision & 0xffff) == 0x117) {
&& (cpu->pal_revision & 0xffff) <= 0x117) {
__asm__ __volatile__(
"lda $16,8($31)\n"
"call_pal 9\n" /* Allow PALRES insns in kernel mode */

3
arch/alpha/kernel/sys_titan.c
View File

@ -257,8 +257,7 @@ titan_dispatch_irqs(u64 mask)
*/
while (mask) {
/* convert to SRM vector... priority is <63> -> <0> */
__asm__("ctlz %1, %0" : "=r"(vector) : "r"(mask));
vector = 63 - vector;
vector = 63 - __kernel_ctlz(mask);
mask &= ~(1UL << vector); /* clear it out */
vector = 0x900 + (vector << 4); /* convert to SRM vector */

1
arch/arm/common/Kconfig
View File

@ -28,6 +28,7 @@ config SHARP_PARAM
config SHARPSL_PM
bool
select APM_EMULATION
config SHARP_SCOOP
bool

11
arch/arm/configs/s3c2410_defconfig
View File

@ -1,10 +1,11 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.21-rc1
# Wed Feb 21 16:48:01 2007
# Linux kernel version: 2.6.21-rc6
# Mon Apr 9 10:12:58 2007
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_TIME is not set
CONFIG_MMU=y
CONFIG_NO_IOPORT=y
@ -45,6 +46,7 @@ CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_IKCONFIG is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
@ -531,7 +533,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
CONFIG_ATA_OVER_ETH=m
@ -560,7 +561,6 @@ CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_IDE_BAST=y
# CONFIG_IDE_CHIPSETS is not set
# CONFIG_BLK_DEV_IDEDMA is not set
# CONFIG_IDEDMA_AUTO is not set
# CONFIG_BLK_DEV_HD is not set
#
@ -941,6 +941,7 @@ CONFIG_LEDS_CLASS=m
# LED drivers
#
CONFIG_LEDS_S3C24XX=m
CONFIG_LEDS_H1940=m
#
# LED Triggers
@ -1125,6 +1126,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_APPLEDISPLAY is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
#
@ -1169,7 +1171,6 @@ CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
CONFIG_RTC_DRV_S3C=y

1
arch/arm/kernel/dma.c
View File

@ -228,6 +228,7 @@ int dma_channel_active(dmach_t channel)
{
return dma_chan[channel].active;
}
EXPORT_SYMBOL(dma_channel_active);
void set_dma_page(dmach_t channel, char pagenr)
{

7
arch/arm/kernel/setup.c
View File

@ -839,8 +839,11 @@ static int __init topology_init(void)
{
int cpu;
for_each_possible_cpu(cpu)
register_cpu(&per_cpu(cpu_data, cpu).cpu, cpu);
for_each_possible_cpu(cpu) {
struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
cpuinfo->cpu.hotpluggable = 1;
register_cpu(&cpuinfo->cpu, cpu);
}
return 0;
}

8
arch/arm/mach-at91/at91sam9260_devices.c
View File

@ -320,16 +320,16 @@ void __init at91_add_device_nand(struct at91_nand_data *data)
at91_sys_write(AT91_SMC_SETUP(3), AT91_SMC_NWESETUP_(0) | AT91_SMC_NCS_WRSETUP_(0)
| AT91_SMC_NRDSETUP_(0) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(2) | AT91_SMC_NCS_WRPULSE_(5)
| AT91_SMC_NRDPULSE_(2) | AT91_SMC_NCS_RDPULSE_(5));
at91_sys_write(AT91_SMC_PULSE(3), AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(3)
| AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
at91_sys_write(AT91_SMC_CYCLE(3), AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
if (data->bus_width_16)
mode = AT91_SMC_DBW_16;
else
mode = AT91_SMC_DBW_8;
at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(1));
at91_sys_write(AT91_SMC_MODE(3), mode | AT91_SMC_READMODE | AT91_SMC_WRITEMODE | AT91_SMC_EXNWMODE_DISABLE | AT91_SMC_TDF_(2));
/* enable pin */
if (data->enable_pin)

3
arch/arm/mach-at91/gpio.c
View File

@ -215,13 +215,14 @@ int gpio_direction_input(unsigned pin)
}
EXPORT_SYMBOL(gpio_direction_input);
int gpio_direction_output(unsigned pin)
int gpio_direction_output(unsigned pin, int value)
{
void __iomem *pio = pin_to_controller(pin);
unsigned mask = pin_to_mask(pin);
if (!pio || !(__raw_readl(pio + PIO_PSR) & mask))
return -EINVAL;
__raw_writel(mask, pio + (value ? PIO_SODR : PIO_CODR));
__raw_writel(mask, pio + PIO_OER);
return 0;
}

15
arch/arm/mach-imx/cpufreq.c
View File

@ -50,6 +50,7 @@
#define CR_920T_ASYNC_MODE 0xC0000000
static u32 mpctl0_at_boot;
static u32 bclk_div_at_boot;
static void imx_set_async_mode(void)
{
@ -82,13 +83,13 @@ static void imx_set_mpctl0(u32 mpctl0)
* imx_compute_mpctl - compute new PLL parameters
* @new_mpctl: pointer to location assigned by new PLL control register value
* @cur_mpctl: current PLL control register parameters
* @f_ref: reference source frequency Hz
* @freq: required frequency in Hz
* @relation: is one of %CPUFREQ_RELATION_L (supremum)
* and %CPUFREQ_RELATION_H (infimum)
*/
long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, unsigned long freq, int relation)
long imx_compute_mpctl(u32 *new_mpctl, u32 cur_mpctl, u32 f_ref, unsigned long freq, int relation)
{
u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
u32 mfi;
u32 mfn;
u32 mfd;
@ -182,7 +183,7 @@ static int imx_set_target(struct cpufreq_policy *policy,
unsigned long flags;
long freq;
long sysclk;
unsigned int bclk_div = 1;
unsigned int bclk_div = bclk_div_at_boot;
/*
* Some governors do not respects CPU and policy lower limits
@ -202,8 +203,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
sysclk = imx_get_system_clk();
if (freq > sysclk + 1000000) {
freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, freq, relation);
if (freq > sysclk / bclk_div_at_boot + 1000000) {
freq = imx_compute_mpctl(&mpctl0, mpctl0_at_boot, CLK32 * 512, freq, relation);
if (freq < 0) {
printk(KERN_WARNING "imx: target frequency %ld Hz cannot be set\n", freq);
return -EINVAL;
@ -217,6 +218,8 @@ static int imx_set_target(struct cpufreq_policy *policy,
if(bclk_div > 16)
bclk_div = 16;
if(bclk_div < bclk_div_at_boot)
bclk_div = bclk_div_at_boot;
}
freq = (sysclk + bclk_div / 2) / bclk_div;
}
@ -285,7 +288,7 @@ static struct cpufreq_driver imx_driver = {
static int __init imx_cpufreq_init(void)
{
bclk_div_at_boot = __mfld2val(CSCR_BCLK_DIV, CSCR) + 1;
mpctl0_at_boot = 0;
if((CSCR & CSCR_MPEN) &&

9
arch/arm/mach-imx/generic.c
View File

@ -102,7 +102,7 @@ EXPORT_SYMBOL(imx_gpio_mode);
* f = 2 * f_ref * --------------------
* pd + 1
*/
static unsigned int imx_decode_pll(unsigned int pll)
static unsigned int imx_decode_pll(unsigned int pll, u32 f_ref)
{
unsigned long long ll;
unsigned long quot;
@ -111,7 +111,6 @@ static unsigned int imx_decode_pll(unsigned int pll)
u32 mfn = pll & 0x3ff;
u32 mfd = (pll >> 16) & 0x3ff;
u32 pd = (pll >> 26) & 0xf;
u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
mfi = mfi <= 5 ? 5 : mfi;
@ -124,13 +123,15 @@ static unsigned int imx_decode_pll(unsigned int pll)
unsigned int imx_get_system_clk(void)
{
return imx_decode_pll(SPCTL0);
u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
return imx_decode_pll(SPCTL0, f_ref);
}
EXPORT_SYMBOL(imx_get_system_clk);
unsigned int imx_get_mcu_clk(void)
{
return imx_decode_pll(MPCTL0);
return imx_decode_pll(MPCTL0, CLK32 * 512);
}
EXPORT_SYMBOL(imx_get_mcu_clk);

4
arch/arm/mach-iop32x/Kconfig
View File

@ -4,6 +4,9 @@ menu "IOP32x Implementation Options"
comment "IOP32x Platform Types"
config MACH_EP80219
bool
config MACH_GLANTANK
bool "Enable support for the IO-Data GLAN Tank"
help
@ -19,6 +22,7 @@ config ARCH_IQ80321
config ARCH_IQ31244
bool "Enable support for EP80219/IQ31244"
select MACH_EP80219
help
Say Y here if you want to run your kernel on the Intel EP80219
evaluation kit for the Intel 80219 processor (a IOP321 variant)

59
arch/arm/mach-iop32x/iq31244.c
View File

@ -39,22 +39,35 @@
#include <asm/arch/time.h>
/*
* The EP80219 and IQ31244 use the same machine ID. To find out
* which of the two we're running on, we look at the processor ID.
* Until March of 2007 iq31244 platforms and ep80219 platforms shared the
* same machine id, and the processor type was used to select board type.
* However this assumption breaks for an iq80219 board which is an iop219
* processor on an iq31244 board. The force_ep80219 flag has been added
* for old boot loaders using the iq31244 machine id for an ep80219 platform.
*/
static int force_ep80219;
static int is_80219(void)
{
extern int processor_id;
return !!((processor_id & 0xffffffe0) == 0x69052e20);
}
static int is_ep80219(void)
{
if (machine_is_ep80219() || force_ep80219)
return 1;
else
return 0;
}
/*
* EP80219/IQ31244 timer tick configuration.
*/
static void __init iq31244_timer_init(void)
{
if (is_80219()) {
if (is_ep80219()) {
/* 33.333 MHz crystal. */
iop_init_time(200000000);
} else {
@ -165,12 +178,18 @@ static struct hw_pci iq31244_pci __initdata = {
static int __init iq31244_pci_init(void)
{
if (machine_is_iq31244()) {
if (is_ep80219())
pci_common_init(&ep80219_pci);
else if (machine_is_iq31244()) {
if (is_80219()) {
pci_common_init(&ep80219_pci);
} else {
pci_common_init(&iq31244_pci);
printk("note: iq31244 board type has been selected\n");
printk("note: to select ep80219 operation:\n");
printk("\t1/ specify \"force_ep80219\" on the kernel"
" command line\n");
printk("\t2/ update boot loader to pass"
" the ep80219 id: %d\n", MACH_TYPE_EP80219);
}
pci_common_init(&iq31244_pci);
}
return 0;
@ -277,10 +296,18 @@ static void __init iq31244_init_machine(void)
platform_device_register(&iq31244_flash_device);
platform_device_register(&iq31244_serial_device);
if (is_80219())
if (is_ep80219())
pm_power_off = ep80219_power_off;
}
static int __init force_ep80219_setup(char *str)
{
force_ep80219 = 1;
return 1;
}
__setup("force_ep80219", force_ep80219_setup);
MACHINE_START(IQ31244, "Intel IQ31244")
/* Maintainer: Intel Corp. */
.phys_io = IQ31244_UART,
@ -291,3 +318,19 @@ MACHINE_START(IQ31244, "Intel IQ31244")
.timer = &iq31244_timer,
.init_machine = iq31244_init_machine,
MACHINE_END
/* There should have been an ep80219 machine identifier from the beginning.
* Boot roms older than March 2007 do not know the ep80219 machine id. Pass
* "force_ep80219" on the kernel command line, otherwise iq31244 operation
* will be selected.
*/
MACHINE_START(EP80219, "Intel EP80219")
/* Maintainer: Intel Corp. */
.phys_io = IQ31244_UART,
.io_pg_offst = ((IQ31244_UART) >> 18) & 0xfffc,
.boot_params = 0xa0000100,
.map_io = iq31244_map_io,
.init_irq = iop32x_init_irq,
.timer = &iq31244_timer,
.init_machine = iq31244_init_machine,
MACHINE_END

2
arch/arm/mach-ns9xxx/mach-cc9p9360dev.c
View File

@ -32,7 +32,7 @@ static void __init mach_cc9p9360dev_init_machine(void)
board_a9m9750dev_init_machine();
}
MACHINE_START(CC9P9360DEV, "Connect Core 9P 9360 on an A9M9750 Devboard")
MACHINE_START(CC9P9360DEV, "Digi ConnectCore 9P 9360 on an A9M9750 Devboard")
.map_io = mach_cc9p9360dev_map_io,
.init_irq = mach_cc9p9360dev_init_irq,
.init_machine = mach_cc9p9360dev_init_machine,

1
arch/arm/mach-omap1/board-h2.c
View File

@ -27,6 +27,7 @@
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/input.h>
#include <linux/workqueue.h>
#include <asm/hardware.h>
#include <asm/mach-types.h>

1
arch/arm/mach-omap2/clock.c
View File

@ -27,6 +27,7 @@
#include <asm/arch/clock.h>
#include <asm/arch/sram.h>
#include <asm/div64.h>
#include "prcm-regs.h"
#include "memory.h"

3
arch/arm/mach-omap2/clock.h
View File

@ -1013,7 +1013,8 @@ static struct clk dss2_fck = { /* Alt clk used in power management */
.name = "dss2_fck",
.parent = &sys_ck, /* fixed at sys_ck or 48MHz */
.flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X |
RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED,
RATE_CKCTL | CM_CORE_SEL1 | RATE_FIXED |
DELAYED_APP,
.enable_reg = (void __iomem *)&CM_FCLKEN1_CORE,
.enable_bit = 1,
.src_offset = 13,

3
arch/arm/mach-pxa/tosa.c
View File

@ -28,6 +28,7 @@
#include <asm/hardware.h>
#include <asm/irq.h>
#include <asm/system.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/irda.h>
#include <asm/arch/mmc.h>
#include <asm/arch/udc.h>
@ -35,8 +36,6 @@
#include <asm/mach/arch.h>
#include <asm/mach/map.h>
#include <asm/mach/irq.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/tosa.h>
#include <asm/hardware/scoop.h>

2
arch/arm/mach-s3c2410/mach-h1940.c
View File

@ -202,7 +202,9 @@ static void __init h1940_map_io(void)
/* setup PM */
#ifdef CONFIG_PM_H1940
memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
#endif
s3c2410_pm_init();
}

2
arch/arm/mach-s3c2440/mach-rx3715.c
View File

@ -224,7 +224,9 @@ static void __init rx3715_init_irq(void)
static void __init rx3715_init_machine(void)
{
#ifdef CONFIG_PM_H1940
memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
#endif
s3c2410_pm_init();
s3c24xx_fb_set_platdata(&rx3715_lcdcfg);

2
arch/arm/mach-s3c2443/irq.c
View File

@ -137,7 +137,7 @@ static struct irq_chip s3c2443_irq_lcd = {
static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
{
s3c2443_irq_demux(IRQ_S3C2443_DMA1, 6);
s3c2443_irq_demux(IRQ_S3C2443_DMA0, 6);
}
#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))

4
arch/arm/mach-sa1100/generic.c
View File

@ -27,6 +27,7 @@
#include <asm/mach/map.h>
#include <asm/mach/flash.h>
#include <asm/irq.h>
#include <asm/gpio.h>
#include "generic.h"
@ -153,7 +154,7 @@ int gpio_direction_input(unsigned gpio)
EXPORT_SYMBOL(gpio_direction_input);
int gpio_direction_output(unsigned gpio)
int gpio_direction_output(unsigned gpio, int value)
{
unsigned long flags;
@ -161,6 +162,7 @@ int gpio_direction_output(unsigned gpio)
return -EINVAL;
local_irq_save(flags);
gpio_set_value(gpio, value);
GPDR |= GPIO_GPIO(gpio);
local_irq_restore(flags);
return 0;

99
arch/arm/tools/mach-types
View File

@ -12,7 +12,7 @@
#
# http://www.arm.linux.org.uk/developer/machines/?action=new
#
# Last update: Tue Jan 16 16:52:56 2007
# Last update: Mon Apr 16 21:01:04 2007
#
# machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number
#
@ -1190,13 +1190,12 @@ g500 MACH_G500 G500 1178
bug MACH_BUG BUG 1179
mx33ads MACH_MX33ADS MX33ADS 1180
chub MACH_CHUB CHUB 1181
gta01 MACH_GTA01 GTA01 1182
neo1973_gta01 MACH_NEO1973_GTA01 NEO1973_GTA01 1182
w90n740 MACH_W90N740 W90N740 1183
medallion_sa2410 MACH_MEDALLION_SA2410 MEDALLION_SA2410 1184
ia_cpu_9200_2 MACH_IA_CPU_9200_2 IA_CPU_9200_2 1185
dimmrm9200 MACH_DIMMRM9200 DIMMRM9200 1186
pm9261 MACH_PM9261 PM9261 1187
mx21 MACH_MX21 MX21 1188
ml7304 MACH_ML7304 ML7304 1189
ucp250 MACH_UCP250 UCP250 1190
intboard MACH_INTBOARD INTBOARD 1191
@ -1242,3 +1241,97 @@ xscale_treo680 MACH_XSCALE_TREO680 XSCALE_TREO680 1230
tecon_tmezon MACH_TECON_TMEZON TECON_TMEZON 1231
zylonite MACH_ZYLONITE ZYLONITE 1233
gene1270 MACH_GENE1270 GENE1270 1234
zir2412 MACH_ZIR2412 ZIR2412 1235
mx31lite MACH_MX31LITE MX31LITE 1236
t700wx MACH_T700WX T700WX 1237
vf100 MACH_VF100 VF100 1238
nsb2 MACH_NSB2 NSB2 1239
nxhmi_bb MACH_NXHMI_BB NXHMI_BB 1240
nxhmi_re MACH_NXHMI_RE NXHMI_RE 1241
n4100pro MACH_N4100PRO N4100PRO 1242
sam9260 MACH_SAM9260 SAM9260 1243
omap_treo600 MACH_OMAP_TREO600 OMAP_TREO600 1244
indy2410 MACH_INDY2410 INDY2410 1245
nelt_a MACH_NELT_A NELT_A 1246
n311 MACH_N311 N311 1248
at91sam9260vgk MACH_AT91SAM9260VGK AT91SAM9260VGK 1249
at91leppe MACH_AT91LEPPE AT91LEPPE 1250
at91lepccn MACH_AT91LEPCCN AT91LEPCCN 1251
apc7100 MACH_APC7100 APC7100 1252
stargazer MACH_STARGAZER STARGAZER 1253
sonata MACH_SONATA SONATA 1254
schmoogie MACH_SCHMOOGIE SCHMOOGIE 1255
aztool MACH_AZTOOL AZTOOL 1256
mioa701 MACH_MIOA701 MIOA701 1257
sxni9260 MACH_SXNI9260 SXNI9260 1258
mxc27520evb MACH_MXC27520EVB MXC27520EVB 1259
armadillo5x0 MACH_ARMADILLO5X0 ARMADILLO5X0 1260
mb9260 MACH_MB9260 MB9260 1261
mb9263 MACH_MB9263 MB9263 1262
ipac9302 MACH_IPAC9302 IPAC9302 1263
cc9p9360js MACH_CC9P9360JS CC9P9360JS 1264
gallium MACH_GALLIUM GALLIUM 1265
msc2410 MACH_MSC2410 MSC2410 1266
ghi270 MACH_GHI270 GHI270 1267
davinci_leonardo MACH_DAVINCI_LEONARDO DAVINCI_LEONARDO 1268
oiab MACH_OIAB OIAB 1269
smdk6400 MACH_SMDK6400 SMDK6400 1270
nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271
greenphone MACH_GREENPHONE GREENPHONE 1272
compex42x MACH_COMPEXWP18 COMPEXWP18 1273
xmate MACH_XMATE XMATE 1274
energizer MACH_ENERGIZER ENERGIZER 1275
ime1 MACH_IME1 IME1 1276
sweda_tms MACH_SWEDATMS SWEDATMS 1277
ntnp435c MACH_NTNP435C NTNP435C 1278
spectro2 MACH_SPECTRO2 SPECTRO2 1279
h6039 MACH_H6039 H6039 1280
ep80219 MACH_EP80219 EP80219 1281
samoa_ii MACH_SAMOA_II SAMOA_II 1282
cwmxl MACH_CWMXL CWMXL 1283
as9200 MACH_AS9200 AS9200 1284
sfx1149 MACH_SFX1149 SFX1149 1285
navi010 MACH_NAVI010 NAVI010 1286
multmdp MACH_MULTMDP MULTMDP 1287
scb9520 MACH_SCB9520 SCB9520 1288
htcathena MACH_HTCATHENA HTCATHENA 1289
xp179 MACH_XP179 XP179 1290
h4300 MACH_H4300 H4300 1291
goramo_mlr MACH_GORAMO_MLR GORAMO_MLR 1292
mxc30020evb MACH_MXC30020EVB MXC30020EVB 1293
adsbitsymx MACH_ADSBITSIMX ADSBITSIMX 1294
adsportalplus MACH_ADSPORTALPLUS ADSPORTALPLUS 1295
mmsp2plus MACH_MMSP2PLUS MMSP2PLUS 1296
em_x270 MACH_EM_X270 EM_X270 1297
tpp302 MACH_TPP302 TPP302 1298
tpp104 MACH_TPM104 TPM104 1299
tpm102 MACH_TPM102 TPM102 1300
tpm109 MACH_TPM109 TPM109 1301
fbxo1 MACH_FBXO1 FBXO1 1302
hxd8 MACH_HXD8 HXD8 1303
neo1973_gta02 MACH_NEO1973_GTA02 NEO1973_GTA02 1304
emtest MACH_EMTEST EMTEST 1305
ad6900 MACH_AD6900 AD6900 1306
europa MACH_EUROPA EUROPA 1307
metroconnect MACH_METROCONNECT METROCONNECT 1308
ez_s2410 MACH_EZ_S2410 EZ_S2410 1309
ez_s2440 MACH_EZ_S2440 EZ_S2440 1310
ez_ep9312 MACH_EZ_EP9312 EZ_EP9312 1311
ez_ep9315 MACH_EZ_EP9315 EZ_EP9315 1312
ez_x7 MACH_EZ_X7 EZ_X7 1313
godotdb MACH_GODOTDB GODOTDB 1314
mistral MACH_MISTRAL MISTRAL 1315
msm MACH_MSM MSM 1316
ct5910 MACH_CT5910 CT5910 1317
ct5912 MACH_CT5912 CT5912 1318
hynet_ine MACH_HYNET_INE HYNET_INE 1319
hynet_app MACH_HYNET_APP HYNET_APP 1320
msm7200 MACH_MSM7200 MSM7200 1321
msm7600 MACH_MSM7600 MSM7600 1322
ceb255 MACH_CEB255 CEB255 1323
ciel MACH_CIEL CIEL 1324
slm5650 MACH_SLM5650 SLM5650 1325
at91sam9rlek MACH_AT91SAM9RLEK AT91SAM9RLEK 1326
comtech_router MACH_COMTECH_ROUTER COMTECH_ROUTER 1327
sbc2410x MACH_SBC2410X SBC2410X 1328
at4x0bd MACH_AT4X0BD AT4X0BD 1329

4
arch/avr32/mach-at32ap/pio.c
View File

@ -214,7 +214,7 @@ int gpio_direction_input(unsigned int gpio)
}
EXPORT_SYMBOL(gpio_direction_input);
int gpio_direction_output(unsigned int gpio)
int gpio_direction_output(unsigned int gpio, int value)
{
struct pio_device *pio;
unsigned int pin;
@ -223,6 +223,8 @@ int gpio_direction_output(unsigned int gpio)
if (!pio)
return -ENODEV;
gpio_set_value(gpio, value);
pin = gpio & 0x1f;
pio_writel(pio, OER, 1 << pin);

4
arch/cris/arch-v32/drivers/pci/bios.c
View File

@ -100,7 +100,9 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
if ((err = pcibios_enable_resources(dev, mask)) < 0)
return err;
return pcibios_enable_irq(dev);
if (!dev->msi_enabled)
pcibios_enable_irq(dev);
return 0;
}
int pcibios_assign_resources(void)

3
arch/frv/mb93090-mb00/pci-vdk.c
View File

@ -466,6 +466,7 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
if ((err = pcibios_enable_resources(dev, mask)) < 0)
return err;
pcibios_enable_irq(dev);
if (!dev->msi_enabled)
pcibios_enable_irq(dev);
return 0;
}

2
arch/i386/Kconfig
View File

@ -220,7 +220,7 @@ config PARAVIRT
config VMI
bool "VMI Paravirt-ops support"
depends on PARAVIRT
depends on PARAVIRT && !COMPAT_VDSO
help
VMI provides a paravirtualized interface to the VMware ESX server
(it could be used by other hypervisors in theory too, but is not

14
arch/i386/boot/video.S
View File

@ -571,6 +571,16 @@ setr1: lodsw
jmp _m_s
check_vesa:
#ifdef CONFIG_FIRMWARE_EDID
leaw modelist+1024, %di
movw $0x4f00, %ax
int $0x10
cmpw $0x004f, %ax
jnz setbad
movw 4(%di), %ax
movw %ax, vbe_version
#endif
leaw modelist+1024, %di
subb $VIDEO_FIRST_VESA>>8, %bh
movw %bx, %cx # Get mode information structure
@ -1945,6 +1955,9 @@ store_edid:
rep
stosl
cmpw $0x0200, vbe_version # only do EDID on >= VBE2.0
jl no_edid
pushw %es # save ES
xorw %di, %di # Report Capability
pushw %di
@ -1987,6 +2000,7 @@ do_restore: .byte 0 # Screen contents altered during mode change
svga_prefix: .byte VIDEO_FIRST_BIOS>>8 # Default prefix for BIOS modes
graphic_mode: .byte 0 # Graphic mode with a linear frame buffer
dac_size: .byte 6 # DAC bit depth
vbe_version: .word 0 # VBE bios version
# Status messages
keymsg: .ascii "Press <RETURN> to see video modes available, "

43
arch/i386/defconfig
View File

@ -1,10 +1,13 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.20-git8
# Tue Feb 13 11:25:18 2007
# Linux kernel version: 2.6.21-rc3
# Wed Mar 7 15:29:47 2007
#
CONFIG_X86_32=y
CONFIG_GENERIC_TIME=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_SEMAPHORE_SLEEPERS=y
@ -34,6 +37,7 @@ CONFIG_LOCALVERSION_AUTO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
# CONFIG_IPC_NS is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_TASKSTATS is not set
@ -44,6 +48,7 @@ CONFIG_IKCONFIG_PROC=y
# CONFIG_CPUSETS is not set
CONFIG_SYSFS_DEPRECATED=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
@ -103,6 +108,9 @@ CONFIG_DEFAULT_IOSCHED="anticipatory"
#
# Processor type and features
#
# CONFIG_TICK_ONESHOT is not set
# CONFIG_NO_HZ is not set
# CONFIG_HIGH_RES_TIMERS is not set
CONFIG_SMP=y
# CONFIG_X86_PC is not set
# CONFIG_X86_ELAN is not set
@ -235,10 +243,8 @@ CONFIG_ACPI_PROCFS=y
CONFIG_ACPI_AC=y
CONFIG_ACPI_BATTERY=y
CONFIG_ACPI_BUTTON=y
# CONFIG_ACPI_HOTKEY is not set
CONFIG_ACPI_FAN=y
# CONFIG_ACPI_DOCK is not set
# CONFIG_ACPI_BAY is not set
CONFIG_ACPI_PROCESSOR=y
CONFIG_ACPI_THERMAL=y
# CONFIG_ACPI_ASUS is not set
@ -289,6 +295,7 @@ CONFIG_X86_POWERNOW_K8_ACPI=y
# CONFIG_X86_CPUFREQ_NFORCE2 is not set
# CONFIG_X86_LONGRUN is not set
# CONFIG_X86_LONGHAUL is not set
# CONFIG_X86_E_POWERSAVER is not set
#
# shared options
@ -368,7 +375,7 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_TUNNEL=y
CONFIG_INET_XFRM_MODE_TRANSPORT=y
CONFIG_INET_XFRM_MODE_TUNNEL=y
# CONFIG_INET_XFRM_MODE_BEET is not set
@ -470,7 +477,13 @@ CONFIG_FW_LOADER=y
#
# Plug and Play support
#
# CONFIG_PNP is not set
CONFIG_PNP=y
# CONFIG_PNP_DEBUG is not set
#
# Protocols
#
CONFIG_PNPACPI=y
#
# Block devices
@ -490,7 +503,6 @@ CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
CONFIG_BLK_DEV_INITRD=y
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
@ -500,6 +512,7 @@ CONFIG_BLK_DEV_INITRD=y
# CONFIG_IBM_ASM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_SONY_LAPTOP is not set
#
# ATA/ATAPI/MFM/RLL support
@ -526,6 +539,7 @@ CONFIG_BLK_DEV_IDEACPI=y
#
CONFIG_IDE_GENERIC=y
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_IDEPNP is not set
CONFIG_BLK_DEV_IDEPCI=y
# CONFIG_IDEPCI_SHARE_IRQ is not set
# CONFIG_BLK_DEV_OFFBOARD is not set
@ -679,6 +693,7 @@ CONFIG_SATA_VIA=y
# CONFIG_SATA_VITESSE is not set
# CONFIG_SATA_INIC162X is not set
CONFIG_SATA_INTEL_COMBINED=y
CONFIG_SATA_ACPI=y
# CONFIG_PATA_ALI is not set
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
@ -786,6 +801,7 @@ CONFIG_NETDEVICES=y
# CONFIG_BONDING is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_NET_SB1000 is not set
#
# ARCnet devices
@ -979,6 +995,7 @@ CONFIG_HW_CONSOLE=y
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_PNP=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
@ -1064,6 +1081,11 @@ CONFIG_HANGCHECK_TIMER=y
# CONFIG_HWMON is not set
# CONFIG_HWMON_VID is not set
#
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
#
# Multimedia devices
#
@ -1078,7 +1100,7 @@ CONFIG_HANGCHECK_TIMER=y
#
# Graphics support
#
CONFIG_FIRMWARE_EDID=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
# CONFIG_FB is not set
#
@ -1089,7 +1111,6 @@ CONFIG_VGACON_SOFT_SCROLLBACK=y
CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=128
CONFIG_VIDEO_SELECT=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
#
# Sound
@ -1238,6 +1259,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_RIO500 is not set
# CONFIG_USB_LEGOTOWER is not set
# CONFIG_USB_LCD is not set
# CONFIG_USB_BERRY_CHARGE is not set
# CONFIG_USB_LED is not set
# CONFIG_USB_CYPRESS_CY7C63 is not set
# CONFIG_USB_CYTHERM is not set
@ -1248,6 +1270,7 @@ CONFIG_USB_MON=y
# CONFIG_USB_SISUSBVGA is not set
# CONFIG_USB_LD is not set
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
#
@ -1506,6 +1529,7 @@ CONFIG_DEBUG_KERNEL=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_DETECT_SOFTLOCKUP=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
@ -1525,6 +1549,7 @@ CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_FORCED_INLINING is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_LKDTM is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_EARLY_PRINTK=y
CONFIG_DEBUG_STACKOVERFLOW=y
# CONFIG_DEBUG_STACK_USAGE is not set

21
arch/i386/kernel/alternative.c
View File

@ -5,15 +5,9 @@
#include <asm/alternative.h>
#include <asm/sections.h>
static int no_replacement = 0;
static int smp_alt_once = 0;
static int debug_alternative = 0;
static int __init noreplacement_setup(char *s)
{
no_replacement = 1;
return 1;
}
static int __init bootonly(char *str)
{
smp_alt_once = 1;
@ -25,7 +19,6 @@ static int __init debug_alt(char *str)
return 1;
}
__setup("noreplacement", noreplacement_setup);
__setup("smp-alt-boot", bootonly);
__setup("debug-alternative", debug_alt);
@ -252,9 +245,6 @@ void alternatives_smp_module_add(struct module *mod, char *name,
struct smp_alt_module *smp;
unsigned long flags;
if (no_replacement)
return;
if (smp_alt_once) {
if (boot_cpu_has(X86_FEATURE_UP))
alternatives_smp_unlock(locks, locks_end,
@ -289,7 +279,7 @@ void alternatives_smp_module_del(struct module *mod)
struct smp_alt_module *item;
unsigned long flags;
if (no_replacement || smp_alt_once)
if (smp_alt_once)
return;
spin_lock_irqsave(&smp_alt, flags);
@ -320,7 +310,7 @@ void alternatives_smp_switch(int smp)
return;
#endif
if (no_replacement || smp_alt_once)
if (smp_alt_once)
return;
BUG_ON(!smp && (num_online_cpus() > 1));
@ -386,13 +376,6 @@ extern struct paravirt_patch __start_parainstructions[],
void __init alternative_instructions(void)
{
unsigned long flags;
if (no_replacement) {
printk(KERN_INFO "(SMP-)alternatives turned off\n");
free_init_pages("SMP alternatives",
(unsigned long)__smp_alt_begin,
(unsigned long)__smp_alt_end);
return;
}
local_irq_save(flags);
apply_alternatives(__alt_instructions, __alt_instructions_end);

117
arch/i386/kernel/apic.c
View File

@ -28,6 +28,7 @@
#include <linux/clockchips.h>
#include <linux/acpi_pmtmr.h>
#include <linux/module.h>
#include <linux/dmi.h>
#include <asm/atomic.h>
#include <asm/smp.h>
@ -61,6 +62,11 @@ static int enable_local_apic __initdata = 0;
/* Local APIC timer verification ok */
static int local_apic_timer_verify_ok;
/* Disable local APIC timer from the kernel commandline or via dmi quirk */
static int local_apic_timer_disabled;
/* Local APIC timer works in C2 */
int local_apic_timer_c2_ok;
EXPORT_SYMBOL_GPL(local_apic_timer_c2_ok);
/*
* Debug level, exported for io_apic.c
@ -338,6 +344,23 @@ void __init setup_boot_APIC_clock(void)
void (*real_handler)(struct clock_event_device *dev);
unsigned long deltaj;
long delta, deltapm;
int pm_referenced = 0;
if (boot_cpu_has(X86_FEATURE_LAPIC_TIMER_BROKEN))
local_apic_timer_disabled = 1;
/*
* The local apic timer can be disabled via the kernel
* commandline or from the test above. Register the lapic
* timer as a dummy clock event source on SMP systems, so the
* broadcast mechanism is used. On UP systems simply ignore it.
*/
if (local_apic_timer_disabled) {
/* No broadcast on UP ! */
if (num_possible_cpus() > 1)
setup_APIC_timer();
return;
}
apic_printk(APIC_VERBOSE, "Using local APIC timer interrupts.\n"
"calibrating APIC timer ...\n");
@ -357,7 +380,8 @@ void __init setup_boot_APIC_clock(void)
/* Let the interrupts run */
local_irq_enable();
while(lapic_cal_loops <= LAPIC_CAL_LOOPS);
while (lapic_cal_loops <= LAPIC_CAL_LOOPS)
cpu_relax();
local_irq_disable();
@ -394,6 +418,7 @@ void __init setup_boot_APIC_clock(void)
"%lu (%ld)\n", (unsigned long) res, delta);
delta = (long) res;
}
pm_referenced = 1;
}
/* Calculate the scaled math multiplication factor */
@ -423,69 +448,43 @@ void __init setup_boot_APIC_clock(void)
calibration_result / (1000000 / HZ),
calibration_result % (1000000 / HZ));
apic_printk(APIC_VERBOSE, "... verify APIC timer\n");
/*
* Setup the apic timer manually
*/
local_apic_timer_verify_ok = 1;
levt->event_handler = lapic_cal_handler;
lapic_timer_setup(CLOCK_EVT_MODE_PERIODIC, levt);
lapic_cal_loops = -1;
/* Let the interrupts run */
local_irq_enable();
/* We trust the pm timer based calibration */
if (!pm_referenced) {
apic_printk(APIC_VERBOSE, "... verify APIC timer\n");
while(lapic_cal_loops <= LAPIC_CAL_LOOPS);
/*
* Setup the apic timer manually
*/
levt->event_handler = lapic_cal_handler;
lapic_timer_setup(CLOCK_EVT_MODE_PERIODIC, levt);
lapic_cal_loops = -1;
local_irq_disable();
/* Let the interrupts run */
local_irq_enable();
/* Stop the lapic timer */
lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
while(lapic_cal_loops <= LAPIC_CAL_LOOPS)
cpu_relax();
local_irq_enable();
local_irq_disable();
/* Jiffies delta */
deltaj = lapic_cal_j2 - lapic_cal_j1;
apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
/* Stop the lapic timer */
lapic_timer_setup(CLOCK_EVT_MODE_SHUTDOWN, levt);
/* Check, if the PM timer is available */
deltapm = lapic_cal_pm2 - lapic_cal_pm1;
apic_printk(APIC_VERBOSE, "... PM timer delta = %ld\n", deltapm);
local_irq_enable();
local_apic_timer_verify_ok = 0;
/* Jiffies delta */
deltaj = lapic_cal_j2 - lapic_cal_j1;
apic_printk(APIC_VERBOSE, "... jiffies delta = %lu\n", deltaj);
if (deltapm) {
if (deltapm > (pm_100ms - pm_thresh) &&
deltapm < (pm_100ms + pm_thresh)) {
apic_printk(APIC_VERBOSE, "... PM timer result ok\n");
/* Check, if the jiffies result is consistent */
if (deltaj < LAPIC_CAL_LOOPS-2 ||
deltaj > LAPIC_CAL_LOOPS+2) {
/*
* Not sure, what we can do about this one.
* When high resultion timers are active
* and the lapic timer does not stop in C3
* we are fine. Otherwise more trouble might
* be waiting. -- tglx
*/
printk(KERN_WARNING "Global event device %s "
"has wrong frequency "
"(%lu ticks instead of %d)\n",
global_clock_event->name, deltaj,
LAPIC_CAL_LOOPS);
}
local_apic_timer_verify_ok = 1;
}
} else {
/* Check, if the jiffies result is consistent */
if (deltaj >= LAPIC_CAL_LOOPS-2 &&
deltaj <= LAPIC_CAL_LOOPS+2) {
if (deltaj >= LAPIC_CAL_LOOPS-2 && deltaj <= LAPIC_CAL_LOOPS+2)
apic_printk(APIC_VERBOSE, "... jiffies result ok\n");
local_apic_timer_verify_ok = 1;
}
}
else
local_apic_timer_verify_ok = 0;
} else
local_irq_enable();
if (!local_apic_timer_verify_ok) {
printk(KERN_WARNING
@ -1203,6 +1202,20 @@ static int __init parse_nolapic(char *arg)
}
early_param("nolapic", parse_nolapic);
static int __init parse_disable_lapic_timer(char *arg)
{
local_apic_timer_disabled = 1;
return 0;
}
early_param("nolapic_timer", parse_disable_lapic_timer);
static int __init parse_lapic_timer_c2_ok(char *arg)
{
local_apic_timer_c2_ok = 1;
return 0;
}
early_param("lapic_timer_c2_ok", parse_lapic_timer_c2_ok);
static int __init apic_set_verbosity(char *str)
{
if (strcmp("debug", str) == 0)

34
arch/i386/kernel/cpu/amd.c
View File

@ -22,6 +22,37 @@
extern void vide(void);
__asm__(".align 4\nvide: ret");
#define ENABLE_C1E_MASK 0x18000000
#define CPUID_PROCESSOR_SIGNATURE 1
#define CPUID_XFAM 0x0ff00000
#define CPUID_XFAM_K8 0x00000000
#define CPUID_XFAM_10H 0x00100000
#define CPUID_XFAM_11H 0x00200000
#define CPUID_XMOD 0x000f0000
#define CPUID_XMOD_REV_F 0x00040000
/* AMD systems with C1E don't have a working lAPIC timer. Check for that. */
static __cpuinit int amd_apic_timer_broken(void)
{
u32 lo, hi;
u32 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
switch (eax & CPUID_XFAM) {
case CPUID_XFAM_K8:
if ((eax & CPUID_XMOD) < CPUID_XMOD_REV_F)
break;
case CPUID_XFAM_10H:
case CPUID_XFAM_11H:
rdmsr(MSR_K8_ENABLE_C1E, lo, hi);
if (lo & ENABLE_C1E_MASK)
return 1;
break;
default:
/* err on the side of caution */
return 1;
}
return 0;
}
static void __cpuinit init_amd(struct cpuinfo_x86 *c)
{
u32 l, h;
@ -241,6 +272,9 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
if (cpuid_eax(0x80000000) >= 0x80000006)
num_cache_leaves = 3;
if (amd_apic_timer_broken())
set_bit(X86_FEATURE_LAPIC_TIMER_BROKEN, c->x86_capability);
}
static unsigned int __cpuinit amd_size_cache(struct cpuinfo_x86 * c, unsigned int size)

2
arch/i386/kernel/cpu/cpufreq/longhaul.c
View File

@ -758,7 +758,7 @@ static int __init longhaul_cpu_init(struct cpufreq_policy *policy)
NULL, (void *)&pr);
/* Check ACPI support for C3 state */
if (pr != NULL && longhaul_version != TYPE_LONGHAUL_V1) {
if (pr != NULL && longhaul_version == TYPE_POWERSAVER) {
cx = &pr->power.states[ACPI_STATE_C3];
if (cx->address > 0 && cx->latency <= 1000) {
longhaul_flags |= USE_ACPI_C3;

70
arch/i386/kernel/hpet.c
View File

@ -3,6 +3,8 @@
#include <linux/errno.h>
#include <linux/hpet.h>
#include <linux/init.h>
#include <linux/sysdev.h>
#include <linux/pm.h>
#include <asm/hpet.h>
#include <asm/io.h>
@ -197,7 +199,7 @@ static int hpet_next_event(unsigned long delta,
cnt += delta;
hpet_writel(cnt, HPET_T0_CMP);
return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0);
return ((long)(hpet_readl(HPET_COUNTER) - cnt ) > 0) ? -ETIME : 0;
}
/*
@ -307,6 +309,7 @@ int __init hpet_enable(void)
out_nohpet:
iounmap(hpet_virt_address);
hpet_virt_address = NULL;
boot_hpet_disable = 1;
return 0;
}
@ -521,3 +524,68 @@ irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
#endif
/*
* Suspend/resume part
*/
#ifdef CONFIG_PM
static int hpet_suspend(struct sys_device *sys_device, pm_message_t state)
{
unsigned long cfg = hpet_readl(HPET_CFG);
cfg &= ~(HPET_CFG_ENABLE|HPET_CFG_LEGACY);
hpet_writel(cfg, HPET_CFG);
return 0;
}
static int hpet_resume(struct sys_device *sys_device)
{
unsigned int id;
hpet_start_counter();
id = hpet_readl(HPET_ID);
if (id & HPET_ID_LEGSUP)
hpet_enable_int();
return 0;
}
static struct sysdev_class hpet_class = {
set_kset_name("hpet"),
.suspend = hpet_suspend,
.resume = hpet_resume,
};
static struct sys_device hpet_device = {
.id = 0,
.cls = &hpet_class,
};
static __init int hpet_register_sysfs(void)
{
int err;
if (!is_hpet_capable())
return 0;
err = sysdev_class_register(&hpet_class);
if (!err) {
err = sysdev_register(&hpet_device);
if (err)
sysdev_class_unregister(&hpet_class);
}
return err;
}
device_initcall(hpet_register_sysfs);
#endif

2
arch/i386/kernel/i386_ksyms.c
View File

@ -28,3 +28,5 @@ EXPORT_SYMBOL(__read_lock_failed);
#endif
EXPORT_SYMBOL(csum_partial);
EXPORT_SYMBOL(_proxy_pda);

10
arch/i386/kernel/i8253.c
View File

@ -47,9 +47,17 @@ static void init_pit_timer(enum clock_event_mode mode,
outb(LATCH >> 8 , PIT_CH0); /* MSB */
break;
case CLOCK_EVT_MODE_ONESHOT:
/*
* Avoid unnecessary state transitions, as it confuses
* Geode / Cyrix based boxen.
*/
case CLOCK_EVT_MODE_SHUTDOWN:
if (evt->mode == CLOCK_EVT_MODE_UNUSED)
break;
case CLOCK_EVT_MODE_UNUSED:
if (evt->mode == CLOCK_EVT_MODE_SHUTDOWN)
break;
case CLOCK_EVT_MODE_ONESHOT:
/* One shot setup */
outb_p(0x38, PIT_MODE);
udelay(10);

2
arch/i386/kernel/io_apic.c
View File

@ -736,7 +736,7 @@ failed:
return 0;
}
int __init irqbalance_disable(char *str)
int __devinit irqbalance_disable(char *str)
{
irqbalance_disabled = 1;
return 1;

71
arch/i386/kernel/microcode.c
View File

@ -567,6 +567,53 @@ static int cpu_request_microcode(int cpu)
return error;
}
static int apply_microcode_on_cpu(int cpu)
{
struct cpuinfo_x86 *c = cpu_data + cpu;
struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
cpumask_t old;
unsigned int val[2];
int err = 0;
if (!uci->mc)
return -EINVAL;
old = current->cpus_allowed;
set_cpus_allowed(current, cpumask_of_cpu(cpu));
/* Check if the microcode we have in memory matches the CPU */
if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
cpu_has(c, X86_FEATURE_IA64) || uci->sig != cpuid_eax(0x00000001))
err = -EINVAL;
if (!err && ((c->x86_model >= 5) || (c->x86 > 6))) {
/* get processor flags from MSR 0x17 */
rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
if (uci->pf != (1 << ((val[1] >> 18) & 7)))
err = -EINVAL;
}
if (!err) {
wrmsr(MSR_IA32_UCODE_REV, 0, 0);
/* see notes above for revision 1.07. Apparent chip bug */
sync_core();
/* get the current revision from MSR 0x8B */
rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
if (uci->rev != val[1])
err = -EINVAL;
}
if (!err)
apply_microcode(cpu);
else
printk(KERN_ERR "microcode: Could not apply microcode to CPU%d:"
" sig=0x%x, pf=0x%x, rev=0x%x\n",
cpu, uci->sig, uci->pf, uci->rev);
set_cpus_allowed(current, old);
return err;
}
static void microcode_init_cpu(int cpu)
{
cpumask_t old;
@ -577,7 +624,8 @@ static void microcode_init_cpu(int cpu)
set_cpus_allowed(current, cpumask_of_cpu(cpu));
mutex_lock(&microcode_mutex);
collect_cpu_info(cpu);
if (uci->valid && system_state == SYSTEM_RUNNING)
if (uci->valid && system_state == SYSTEM_RUNNING &&
!suspend_cpu_hotplug)
cpu_request_microcode(cpu);
mutex_unlock(&microcode_mutex);
set_cpus_allowed(current, old);
@ -663,13 +711,24 @@ static int mc_sysdev_add(struct sys_device *sys_dev)
return 0;
pr_debug("Microcode:CPU %d added\n", cpu);
memset(uci, 0, sizeof(*uci));
/* If suspend_cpu_hotplug is set, the system is resuming and we should
* use the data from before the suspend.
*/
if (suspend_cpu_hotplug) {
err = apply_microcode_on_cpu(cpu);
if (err)
microcode_fini_cpu(cpu);
}
if (!uci->valid)
memset(uci, 0, sizeof(*uci));
err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group);
if (err)
return err;
microcode_init_cpu(cpu);
if (!uci->valid)
microcode_init_cpu(cpu);
return 0;
}
@ -680,7 +739,11 @@ static int mc_sysdev_remove(struct sys_device *sys_dev)
if (!cpu_online(cpu))
return 0;
pr_debug("Microcode:CPU %d removed\n", cpu);
microcode_fini_cpu(cpu);
/* If suspend_cpu_hotplug is set, the system is suspending and we should
* keep the microcode in memory for the resume.
*/
if (!suspend_cpu_hotplug)
microcode_fini_cpu(cpu);
sysfs_remove_group(&sys_dev->kobj, &mc_attr_group);
return 0;
}

166
arch/i386/kernel/nmi.c
View File

@ -41,16 +41,17 @@ int nmi_watchdog_enabled;
* different subsystems this reservation system just tries to coordinate
* things a little
*/
static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner);
static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[3]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* this number is calculated from Intel's MSR_P4_CRU_ESCR5 register and it's
* offset from MSR_P4_BSU_ESCR0. It will be the max for all platforms (for now)
*/
#define NMI_MAX_COUNTER_BITS 66
#define NMI_MAX_COUNTER_LONGS BITS_TO_LONGS(NMI_MAX_COUNTER_BITS)
static DEFINE_PER_CPU(unsigned long, perfctr_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static DEFINE_PER_CPU(unsigned long, evntsel_nmi_owner[NMI_MAX_COUNTER_LONGS]);
static cpumask_t backtrace_mask = CPU_MASK_NONE;
/* nmi_active:
* >0: the lapic NMI watchdog is active, but can be disabled
* <0: the lapic NMI watchdog has not been set up, and cannot
@ -122,64 +123,129 @@ static inline unsigned int nmi_evntsel_msr_to_bit(unsigned int msr)
/* checks for a bit availability (hack for oprofile) */
int avail_to_resrv_perfctr_nmi_bit(unsigned int counter)
{
int cpu;
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
return (!test_bit(counter, &__get_cpu_var(perfctr_nmi_owner)));
for_each_possible_cpu (cpu) {
if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
return 0;
}
return 1;
}
/* checks the an msr for availability */
int avail_to_resrv_perfctr_nmi(unsigned int msr)
{
unsigned int counter;
int cpu;
counter = nmi_perfctr_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
return (!test_bit(counter, &__get_cpu_var(perfctr_nmi_owner)));
for_each_possible_cpu (cpu) {
if (test_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
return 0;
}
return 1;
}
static int __reserve_perfctr_nmi(int cpu, unsigned int msr)
{
unsigned int counter;
if (cpu < 0)
cpu = smp_processor_id();
counter = nmi_perfctr_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
if (!test_and_set_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]))
return 1;
return 0;
}
static void __release_perfctr_nmi(int cpu, unsigned int msr)
{
unsigned int counter;
if (cpu < 0)
cpu = smp_processor_id();
counter = nmi_perfctr_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
clear_bit(counter, &per_cpu(perfctr_nmi_owner, cpu)[0]);
}
int reserve_perfctr_nmi(unsigned int msr)
{
unsigned int counter;
counter = nmi_perfctr_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
if (!test_and_set_bit(counter, &__get_cpu_var(perfctr_nmi_owner)))
return 1;
return 0;
int cpu, i;
for_each_possible_cpu (cpu) {
if (!__reserve_perfctr_nmi(cpu, msr)) {
for_each_possible_cpu (i) {
if (i >= cpu)
break;
__release_perfctr_nmi(i, msr);
}
return 0;
}
}
return 1;
}
void release_perfctr_nmi(unsigned int msr)
{
unsigned int counter;
counter = nmi_perfctr_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
clear_bit(counter, &__get_cpu_var(perfctr_nmi_owner));
int cpu;
for_each_possible_cpu (cpu) {
__release_perfctr_nmi(cpu, msr);
}
}
int reserve_evntsel_nmi(unsigned int msr)
int __reserve_evntsel_nmi(int cpu, unsigned int msr)
{
unsigned int counter;
if (cpu < 0)
cpu = smp_processor_id();
counter = nmi_evntsel_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
if (!test_and_set_bit(counter, &__get_cpu_var(evntsel_nmi_owner)[0]))
if (!test_and_set_bit(counter, &per_cpu(evntsel_nmi_owner, cpu)[0]))
return 1;
return 0;
}
void release_evntsel_nmi(unsigned int msr)
static void __release_evntsel_nmi(int cpu, unsigned int msr)
{
unsigned int counter;
if (cpu < 0)
cpu = smp_processor_id();
counter = nmi_evntsel_msr_to_bit(msr);
BUG_ON(counter > NMI_MAX_COUNTER_BITS);
clear_bit(counter, &__get_cpu_var(evntsel_nmi_owner)[0]);
clear_bit(counter, &per_cpu(evntsel_nmi_owner, cpu)[0]);
}
int reserve_evntsel_nmi(unsigned int msr)
{
int cpu, i;
for_each_possible_cpu (cpu) {
if (!__reserve_evntsel_nmi(cpu, msr)) {
for_each_possible_cpu (i) {
if (i >= cpu)
break;
__release_evntsel_nmi(i, msr);
}
return 0;
}
}
return 1;
}
void release_evntsel_nmi(unsigned int msr)
{
int cpu;
for_each_possible_cpu (cpu) {
__release_evntsel_nmi(cpu, msr);
}
}
static __cpuinit inline int nmi_known_cpu(void)
@ -245,14 +311,6 @@ static int __init check_nmi_watchdog(void)
unsigned int *prev_nmi_count;
int cpu;
/* Enable NMI watchdog for newer systems.
Probably safe on most older systems too, but let's be careful.
IBM ThinkPads use INT10 inside SMM and that allows early NMI inside SMM
which hangs the system. Disable watchdog for all thinkpads */
if (nmi_watchdog == NMI_DEFAULT && dmi_get_year(DMI_BIOS_DATE) >= 2004 &&
!dmi_name_in_vendors("ThinkPad"))
nmi_watchdog = NMI_LOCAL_APIC;
if ((nmi_watchdog == NMI_NONE) || (nmi_watchdog == NMI_DEFAULT))
return 0;
@ -271,7 +329,7 @@ static int __init check_nmi_watchdog(void)
for_each_possible_cpu(cpu)
prev_nmi_count[cpu] = per_cpu(irq_stat, cpu).__nmi_count;
local_irq_enable();
mdelay((10*1000)/nmi_hz); // wait 10 ticks
mdelay((20*1000)/nmi_hz); // wait 20 ticks
for_each_possible_cpu(cpu) {
#ifdef CONFIG_SMP
@ -515,10 +573,10 @@ static int setup_k7_watchdog(void)
perfctr_msr = MSR_K7_PERFCTR0;
evntsel_msr = MSR_K7_EVNTSEL0;
if (!reserve_perfctr_nmi(perfctr_msr))
if (!__reserve_perfctr_nmi(-1, perfctr_msr))
goto fail;
if (!reserve_evntsel_nmi(evntsel_msr))
if (!__reserve_evntsel_nmi(-1, evntsel_msr))
goto fail1;
wrmsrl(perfctr_msr, 0UL);
@ -541,7 +599,7 @@ static int setup_k7_watchdog(void)
wd->check_bit = 1ULL<<63;
return 1;
fail1:
release_perfctr_nmi(perfctr_msr);
__release_perfctr_nmi(-1, perfctr_msr);
fail:
return 0;
}
@ -552,8 +610,8 @@ static void stop_k7_watchdog(void)
wrmsr(wd->evntsel_msr, 0, 0);
release_evntsel_nmi(wd->evntsel_msr);
release_perfctr_nmi(wd->perfctr_msr);
__release_evntsel_nmi(-1, wd->evntsel_msr);
__release_perfctr_nmi(-1, wd->perfctr_msr);
}
#define P6_EVNTSEL0_ENABLE (1 << 22)
@ -571,10 +629,10 @@ static int setup_p6_watchdog(void)
perfctr_msr = MSR_P6_PERFCTR0;
evntsel_msr = MSR_P6_EVNTSEL0;
if (!reserve_perfctr_nmi(perfctr_msr))
if (!__reserve_perfctr_nmi(-1, perfctr_msr))
goto fail;
if (!reserve_evntsel_nmi(evntsel_msr))
if (!__reserve_evntsel_nmi(-1, evntsel_msr))
goto fail1;
wrmsrl(perfctr_msr, 0UL);
@ -598,7 +656,7 @@ static int setup_p6_watchdog(void)
wd->check_bit = 1ULL<<39;
return 1;
fail1:
release_perfctr_nmi(perfctr_msr);
__release_perfctr_nmi(-1, perfctr_msr);
fail:
return 0;
}
@ -609,8 +667,8 @@ static void stop_p6_watchdog(void)
wrmsr(wd->evntsel_msr, 0, 0);
release_evntsel_nmi(wd->evntsel_msr);
release_perfctr_nmi(wd->perfctr_msr);
__release_evntsel_nmi(-1, wd->evntsel_msr);
__release_perfctr_nmi(-1, wd->perfctr_msr);
}
/* Note that these events don't tick when the CPU idles. This means
@ -676,10 +734,10 @@ static int setup_p4_watchdog(void)
cccr_val = P4_CCCR_OVF_PMI1 | P4_CCCR_ESCR_SELECT(4);
}
if (!reserve_perfctr_nmi(perfctr_msr))
if (!__reserve_perfctr_nmi(-1, perfctr_msr))
goto fail;
if (!reserve_evntsel_nmi(evntsel_msr))
if (!__reserve_evntsel_nmi(-1, evntsel_msr))
goto fail1;
evntsel = P4_ESCR_EVENT_SELECT(0x3F)
@ -703,7 +761,7 @@ static int setup_p4_watchdog(void)
wd->check_bit = 1ULL<<39;
return 1;
fail1:
release_perfctr_nmi(perfctr_msr);
__release_perfctr_nmi(-1, perfctr_msr);
fail:
return 0;
}
@ -715,8 +773,8 @@ static void stop_p4_watchdog(void)
wrmsr(wd->cccr_msr, 0, 0);
wrmsr(wd->evntsel_msr, 0, 0);
release_evntsel_nmi(wd->evntsel_msr);
release_perfctr_nmi(wd->perfctr_msr);
__release_evntsel_nmi(-1, wd->evntsel_msr);
__release_perfctr_nmi(-1, wd->perfctr_msr);
}
#define ARCH_PERFMON_NMI_EVENT_SEL ARCH_PERFMON_UNHALTED_CORE_CYCLES_SEL
@ -744,10 +802,10 @@ static int setup_intel_arch_watchdog(void)
perfctr_msr = MSR_ARCH_PERFMON_PERFCTR0;
evntsel_msr = MSR_ARCH_PERFMON_EVENTSEL0;
if (!reserve_perfctr_nmi(perfctr_msr))
if (!__reserve_perfctr_nmi(-1, perfctr_msr))
goto fail;
if (!reserve_evntsel_nmi(evntsel_msr))
if (!__reserve_evntsel_nmi(-1, evntsel_msr))
goto fail1;
wrmsrl(perfctr_msr, 0UL);
@ -772,7 +830,7 @@ static int setup_intel_arch_watchdog(void)
wd->check_bit = 1ULL << (eax.split.bit_width - 1);
return 1;
fail1:
release_perfctr_nmi(perfctr_msr);
__release_perfctr_nmi(-1, perfctr_msr);
fail:
return 0;
}
@ -795,8 +853,8 @@ static void stop_intel_arch_watchdog(void)
return;
wrmsr(wd->evntsel_msr, 0, 0);
release_evntsel_nmi(wd->evntsel_msr);
release_perfctr_nmi(wd->perfctr_msr);
__release_evntsel_nmi(-1, wd->evntsel_msr);
__release_perfctr_nmi(-1, wd->perfctr_msr);
}
void setup_apic_nmi_watchdog (void *unused)

9
arch/i386/kernel/tsc.c
View File

@ -18,6 +18,8 @@
#include "mach_timer.h"
static int tsc_enabled;
/*
* On some systems the TSC frequency does not
* change with the cpu frequency. So we need
@ -105,7 +107,7 @@ unsigned long long sched_clock(void)
/*
* Fall back to jiffies if there's no TSC available:
*/
if (unlikely(tsc_disable))
if (unlikely(!tsc_enabled))
/* No locking but a rare wrong value is not a big deal: */
return (jiffies_64 - INITIAL_JIFFIES) * (1000000000 / HZ);
@ -283,6 +285,7 @@ void mark_tsc_unstable(void)
{
if (!tsc_unstable) {
tsc_unstable = 1;
tsc_enabled = 0;
/* Can be called before registration */
if (clocksource_tsc.mult)
clocksource_change_rating(&clocksource_tsc, 0);
@ -383,7 +386,9 @@ void __init tsc_init(void)
if (check_tsc_unstable()) {
clocksource_tsc.rating = 0;
clocksource_tsc.flags &= ~CLOCK_SOURCE_IS_CONTINUOUS;
}
} else
tsc_enabled = 1;
clocksource_register(&clocksource_tsc);
return;

49
arch/i386/kernel/vmi.c
View File

@ -23,7 +23,6 @@
*/
#include <linux/module.h>
#include <linux/license.h>
#include <linux/cpu.h>
#include <linux/bootmem.h>
#include <linux/mm.h>
@ -48,7 +47,6 @@ typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int);
(((VROMLONGFUNC *)(rom->func)) (arg))
static struct vrom_header *vmi_rom;
static int license_gplok;
static int disable_pge;
static int disable_pse;
static int disable_sep;
@ -71,6 +69,7 @@ struct {
void (*flush_tlb)(int);
void (*set_initial_ap_state)(int, int);
void (*halt)(void);
void (*set_lazy_mode)(int mode);
} vmi_ops;
/* XXX move this to alternative.h */
@ -576,6 +575,26 @@ vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip,
}
#endif
static void vmi_set_lazy_mode(int mode)
{
static DEFINE_PER_CPU(int, lazy_mode);
if (!vmi_ops.set_lazy_mode)
return;
/* Modes should never nest or overlap */
BUG_ON(__get_cpu_var(lazy_mode) && !(mode == PARAVIRT_LAZY_NONE ||
mode == PARAVIRT_LAZY_FLUSH));
if (mode == PARAVIRT_LAZY_FLUSH) {
vmi_ops.set_lazy_mode(0);
vmi_ops.set_lazy_mode(__get_cpu_var(lazy_mode));
} else {
vmi_ops.set_lazy_mode(mode);
__get_cpu_var(lazy_mode) = mode;
}
}
static inline int __init check_vmi_rom(struct vrom_header *rom)
{
struct pci_header *pci;
@ -629,13 +648,14 @@ static inline int __init check_vmi_rom(struct vrom_header *rom)
rom->api_version_maj, rom->api_version_min,
pci->rom_version_maj, pci->rom_version_min);
license_gplok = license_is_gpl_compatible(license);
if (!license_gplok) {
printk(KERN_WARNING "VMI: ROM license '%s' taints kernel... "
"inlining disabled\n",
license);
add_taint(TAINT_PROPRIETARY_MODULE);
}
/* Don't allow BSD/MIT here for now because we don't want to end up
with any binary only shim layers */
if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) {
printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n",
license);
return 0;
}
return 1;
}
@ -692,11 +712,14 @@ static void *vmi_get_function(int vmicall)
do { \
reloc = call_vrom_long_func(vmi_rom, get_reloc, \
VMI_CALL_##vmicall); \
if (rel->type != VMI_RELOCATION_NONE) { \
BUG_ON(rel->type != VMI_RELOCATION_CALL_REL); \
if (rel->type == VMI_RELOCATION_CALL_REL) \
paravirt_ops.opname = (void *)rel->eip; \
} else if (rel->type == VMI_RELOCATION_NOP) \
else if (rel->type == VMI_RELOCATION_NOP) \
paravirt_ops.opname = (void *)vmi_nop; \
else if (rel->type != VMI_RELOCATION_NONE) \
printk(KERN_WARNING "VMI: Unknown relocation " \
"type %d for " #vmicall"\n",\
rel->type); \
} while (0)
/*
@ -805,7 +828,7 @@ static inline int __init activate_vmi(void)
para_wrap(load_esp0, vmi_load_esp0, set_kernel_stack, UpdateKernelStack);
para_fill(set_iopl_mask, SetIOPLMask);
para_fill(io_delay, IODelay);
para_fill(set_lazy_mode, SetLazyMode);
para_wrap(set_lazy_mode, vmi_set_lazy_mode, set_lazy_mode, SetLazyMode);
/* user and kernel flush are just handled with different flags to FlushTLB */
para_wrap(flush_tlb_user, vmi_flush_tlb_user, flush_tlb, FlushTLB);

2
arch/i386/kernel/vmlinux.lds.S
View File

@ -26,7 +26,7 @@ OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(phys_startup_32)
jiffies = jiffies_64;
_proxy_pda = 0;
_proxy_pda = 1;
PHDRS {
text PT_LOAD FLAGS(5); /* R_E */

9
arch/i386/lib/usercopy.c
View File

@ -10,6 +10,7 @@
#include <linux/blkdev.h>
#include <linux/module.h>
#include <linux/backing-dev.h>
#include <linux/interrupt.h>
#include <asm/uaccess.h>
#include <asm/mmx.h>
@ -719,6 +720,14 @@ unsigned long __copy_to_user_ll(void __user *to, const void *from,
#ifndef CONFIG_X86_WP_WORKS_OK
if (unlikely(boot_cpu_data.wp_works_ok == 0) &&
((unsigned long )to) < TASK_SIZE) {
/*
* When we are in an atomic section (see
* mm/filemap.c:file_read_actor), return the full
* length to take the slow path.
*/
if (in_atomic())
return n;
/*
* CPU does not honor the WP bit when writing
* from supervisory mode, and due to preemption or SMP,

2
arch/i386/mm/highmem.c
View File

@ -42,6 +42,7 @@ void *kmap_atomic(struct page *page, enum km_type type)
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
set_pte(kmap_pte-idx, mk_pte(page, kmap_prot));
arch_flush_lazy_mmu_mode();
return (void*) vaddr;
}
@ -82,6 +83,7 @@ void *kmap_atomic_pfn(unsigned long pfn, enum km_type type)
idx = type + KM_TYPE_NR*smp_processor_id();
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
set_pte(kmap_pte-idx, pfn_pte(pfn, kmap_prot));
arch_flush_lazy_mmu_mode();
return (void*) vaddr;
}

14
arch/i386/pci/common.c
View File

@ -191,6 +191,14 @@ static struct dmi_system_id __devinitdata pciprobe_dmi_table[] = {
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
},
},
{
.callback = set_bf_sort,
.ident = "Dell PowerEdge R900",
.matches = {
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
},
},
{
.callback = set_bf_sort,
.ident = "HP ProLiant BL20p G3",
@ -426,11 +434,13 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
if ((err = pcibios_enable_resources(dev, mask)) < 0)
return err;
return pcibios_enable_irq(dev);
if (!dev->msi_enabled)
return pcibios_enable_irq(dev);
return 0;
}
void pcibios_disable_device (struct pci_dev *dev)
{
if (pcibios_disable_irq)
if (!dev->msi_enabled && pcibios_disable_irq)
pcibios_disable_irq(dev);
}

1
arch/ia64/Kconfig
View File

@ -13,6 +13,7 @@ config IA64
bool
select PCI if (!IA64_HP_SIM)
select ACPI if (!IA64_HP_SIM)
select PM if (!IA64_HP_SIM)
default y
help
The Itanium Processor Family is Intel's 64-bit successor to

2
arch/ia64/kernel/crash.c
View File

@ -164,7 +164,7 @@ kdump_init_notifier(struct notifier_block *self, unsigned long val, void *data)
nd = (struct ia64_mca_notify_die *)args->err;
/* Reason code 1 means machine check rendezous*/
if ((val == DIE_INIT_MONARCH_ENTER || DIE_INIT_SLAVE_ENTER) &&
if ((val == DIE_INIT_MONARCH_ENTER || val == DIE_INIT_SLAVE_ENTER) &&
nd->sos->rv_rc == 1)
return NOTIFY_DONE;

6
arch/ia64/kernel/msi_ia64.c
View File

@ -68,7 +68,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
{
struct msi_msg msg;
unsigned long dest_phys_id;
unsigned int irq, vector;
int irq, vector;
irq = create_irq();
if (irq < 0)
@ -76,7 +76,7 @@ int ia64_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
set_irq_msi(irq, desc);
dest_phys_id = cpu_physical_id(first_cpu(cpu_online_map));
vector = irq;
vector = irq_to_vector(irq);
msg.address_hi = 0;
msg.address_lo =
@ -110,7 +110,7 @@ static void ia64_ack_msi_irq(unsigned int irq)
static int ia64_msi_retrigger_irq(unsigned int irq)
{
unsigned int vector = irq;
unsigned int vector = irq_to_vector(irq);
ia64_resend_irq(vector);
return 1;

24
arch/ia64/kernel/setup.c
View File

@ -640,7 +640,7 @@ show_cpuinfo (struct seq_file *m, void *v)
"features : %s\n"
"cpu number : %lu\n"
"cpu regs : %u\n"
"cpu MHz : %lu.%06lu\n"
"cpu MHz : %lu.%03lu\n"
"itc MHz : %lu.%06lu\n"
"BogoMIPS : %lu.%02lu\n",
cpunum, c->vendor, c->family, c->model,
@ -692,12 +692,15 @@ struct seq_operations cpuinfo_op = {
.show = show_cpuinfo
};
static char brandname[128];
#define MAX_BRANDS 8
static char brandname[MAX_BRANDS][128];
static char * __cpuinit
get_model_name(__u8 family, __u8 model)
{
static int overflow;
char brand[128];
int i;
memcpy(brand, "Unknown", 8);
if (ia64_pal_get_brand_info(brand)) {
@ -709,12 +712,17 @@ get_model_name(__u8 family, __u8 model)
case 2: memcpy(brand, "Madison up to 9M cache", 23); break;
}
}
if (brandname[0] == '\0')
return strcpy(brandname, brand);
else if (strcmp(brandname, brand) == 0)
return brandname;
else
return kstrdup(brand, GFP_KERNEL);
for (i = 0; i < MAX_BRANDS; i++)
if (strcmp(brandname[i], brand) == 0)
return brandname[i];
for (i = 0; i < MAX_BRANDS; i++)
if (brandname[i][0] == '\0')
return strcpy(brandname[i], brand);
if (overflow++ == 0)
printk(KERN_ERR
"%s: Table overflow. Some processor model information will be missing\n",
__FUNCTION__);
return "Unknown";
}
static void __cpuinit

17
arch/ia64/kernel/smpboot.c
View File

@ -375,6 +375,7 @@ static void __devinit
smp_callin (void)
{
int cpuid, phys_id, itc_master;
struct cpuinfo_ia64 *last_cpuinfo, *this_cpuinfo;
extern void ia64_init_itm(void);
extern volatile int time_keeper_id;
@ -424,7 +425,21 @@ smp_callin (void)
* Get our bogomips.
*/
ia64_init_itm();
calibrate_delay();
/*
* Delay calibration can be skipped if new processor is identical to the
* previous processor.
*/
last_cpuinfo = cpu_data(cpuid - 1);
this_cpuinfo = local_cpu_data;
if (last_cpuinfo->itc_freq != this_cpuinfo->itc_freq ||
last_cpuinfo->proc_freq != this_cpuinfo->proc_freq ||
last_cpuinfo->features != this_cpuinfo->features ||
last_cpuinfo->revision != this_cpuinfo->revision ||
last_cpuinfo->family != this_cpuinfo->family ||
last_cpuinfo->archrev != this_cpuinfo->archrev ||
last_cpuinfo->model != this_cpuinfo->model)
calibrate_delay();
local_cpu_data->loops_per_jiffy = loops_per_jiffy;
#ifdef CONFIG_IA32_SUPPORT

30
arch/ia64/mm/contig.c
View File

@ -96,26 +96,6 @@ void show_mem(void)
/* physical address where the bootmem map is located */
unsigned long bootmap_start;
/**
* find_max_pfn - adjust the maximum page number callback
* @start: start of range
* @end: end of range
* @arg: address of pointer to global max_pfn variable
*
* Passed as a callback function to efi_memmap_walk() to determine the highest
* available page frame number in the system.
*/
int
find_max_pfn (unsigned long start, unsigned long end, void *arg)
{
unsigned long *max_pfnp = arg, pfn;
pfn = (PAGE_ALIGN(end - 1) - PAGE_OFFSET) >> PAGE_SHIFT;
if (pfn > *max_pfnp)
*max_pfnp = pfn;
return 0;
}
/**
* find_bootmap_location - callback to find a memory area for the bootmap
* @start: start of region
@ -177,9 +157,10 @@ find_memory (void)
reserve_memory();
/* first find highest page frame number */
max_pfn = 0;
efi_memmap_walk(find_max_pfn, &max_pfn);
min_low_pfn = ~0UL;
max_low_pfn = 0;
efi_memmap_walk(find_max_min_low_pfn, NULL);
max_pfn = max_low_pfn;
/* how many bytes to cover all the pages */
bootmap_size = bootmem_bootmap_pages(max_pfn) << PAGE_SHIFT;
@ -189,7 +170,8 @@ find_memory (void)
if (bootmap_start == ~0UL)
panic("Cannot find %ld bytes for bootmap\n", bootmap_size);
bootmap_size = init_bootmem(bootmap_start >> PAGE_SHIFT, max_pfn);
bootmap_size = init_bootmem_node(NODE_DATA(0),
(bootmap_start >> PAGE_SHIFT), 0, max_pfn);
/* Free all available memory, then mark bootmem-map as being in use. */
efi_memmap_walk(filter_rsvd_memory, free_bootmem);

4
arch/ia64/mm/discontig.c
View File

@ -88,9 +88,6 @@ static int __init build_node_maps(unsigned long start, unsigned long len,
bdp->node_low_pfn = max(epfn, bdp->node_low_pfn);
}
min_low_pfn = min(min_low_pfn, bdp->node_boot_start>>PAGE_SHIFT);
max_low_pfn = max(max_low_pfn, bdp->node_low_pfn);
return 0;
}
@ -438,6 +435,7 @@ void __init find_memory(void)
/* These actually end up getting called by call_pernode_memory() */
efi_memmap_walk(filter_rsvd_memory, build_node_maps);
efi_memmap_walk(filter_rsvd_memory, find_pernode_space);
efi_memmap_walk(find_max_min_low_pfn, NULL);
for_each_online_node(node)
if (mem_data[node].bootmem_data.node_low_pfn) {

18
arch/ia64/mm/init.c
View File

@ -155,7 +155,7 @@ ia64_set_rbs_bot (void)
if (stack_size > MAX_USER_STACK_SIZE)
stack_size = MAX_USER_STACK_SIZE;
current->thread.rbs_bot = STACK_TOP - stack_size;
current->thread.rbs_bot = PAGE_ALIGN(current->mm->start_stack - stack_size);
}
/*
@ -648,6 +648,22 @@ count_reserved_pages (u64 start, u64 end, void *arg)
return 0;
}
int
find_max_min_low_pfn (unsigned long start, unsigned long end, void *arg)
{
unsigned long pfn_start, pfn_end;
#ifdef CONFIG_FLATMEM
pfn_start = (PAGE_ALIGN(__pa(start))) >> PAGE_SHIFT;
pfn_end = (PAGE_ALIGN(__pa(end - 1))) >> PAGE_SHIFT;
#else
pfn_start = GRANULEROUNDDOWN(__pa(start)) >> PAGE_SHIFT;
pfn_end = GRANULEROUNDUP(__pa(end - 1)) >> PAGE_SHIFT;
#endif
min_low_pfn = min(min_low_pfn, pfn_start);
max_low_pfn = max(max_low_pfn, pfn_end);
return 0;
}
/*
* Boot command-line option "nolwsys" can be used to disable the use of any light-weight
* system call handler. When this option is in effect, all fsyscalls will end up bubbling

7
arch/ia64/pci/pci.c
View File

@ -557,14 +557,17 @@ pcibios_enable_device (struct pci_dev *dev, int mask)
if (ret < 0)
return ret;
return acpi_pci_irq_enable(dev);
if (!dev->msi_enabled)
return acpi_pci_irq_enable(dev);
return 0;
}
void
pcibios_disable_device (struct pci_dev *dev)
{
BUG_ON(atomic_read(&dev->enable_cnt));
acpi_pci_irq_disable(dev);
if (!dev->msi_enabled)
acpi_pci_irq_disable(dev);
}
void

6
arch/ia64/sn/kernel/bte_error.c
View File

@ -78,7 +78,7 @@ int shub1_bte_error_handler(unsigned long _nodepda)
* There are errors which still need to be cleaned up by
* hubiio_crb_error_handler
*/
mod_timer(recovery_timer, HZ * 5);
mod_timer(recovery_timer, jiffies + (HZ * 5));
BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,
smp_processor_id()));
return 1;
@ -95,7 +95,7 @@ int shub1_bte_error_handler(unsigned long _nodepda)
icrbd.ii_icrb0_d_regval =
REMOTE_HUB_L(nasid, IIO_ICRB_D(i));
if (icrbd.d_bteop) {
mod_timer(recovery_timer, HZ * 5);
mod_timer(recovery_timer, jiffies + (HZ * 5));
BTE_PRINTK(("eh:%p:%d Valid %d, Giving up\n",
err_nodepda, smp_processor_id(),
i));
@ -150,7 +150,7 @@ int shub2_bte_error_handler(unsigned long _nodepda)
status = BTE_LNSTAT_LOAD(bte);
if ((status & IBLS_ERROR) || !(status & IBLS_BUSY))
continue;
mod_timer(recovery_timer, HZ * 5);
mod_timer(recovery_timer, jiffies + (HZ * 5));
BTE_PRINTK(("eh:%p:%d Marked Giving up\n", err_nodepda,
smp_processor_id()));
return 1;

12
arch/ia64/sn/kernel/io_init.c
View File

@ -247,10 +247,18 @@ sn_io_slot_fixup(struct pci_dev *dev)
addr = ((addr << 4) >> 4) | __IA64_UNCACHED_OFFSET;
dev->resource[idx].start = addr;
dev->resource[idx].end = addr + size;
/*
* if it's already in the device structure, remove it before
* inserting
*/
if (dev->resource[idx].parent && dev->resource[idx].parent->child)
release_resource(&dev->resource[idx]);
if (dev->resource[idx].flags & IORESOURCE_IO)
dev->resource[idx].parent = &ioport_resource;
insert_resource(&ioport_resource, &dev->resource[idx]);
else
dev->resource[idx].parent = &iomem_resource;
insert_resource(&iomem_resource, &dev->resource[idx]);
/* If ROM, mark as shadowed in PROM */
if (idx == PCI_ROM_RESOURCE)
dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;

6
arch/ia64/sn/kernel/setup.c
View File

@ -348,8 +348,7 @@ sn_scan_pcdp(void)
continue; /* not PCI interconnect */
if (if_pci.translation & PCDP_PCI_TRANS_IOPORT)
vga_console_iobase =
if_pci.ioport_tra | __IA64_UNCACHED_OFFSET;
vga_console_iobase = if_pci.ioport_tra;
if (if_pci.translation & PCDP_PCI_TRANS_MMIO)
vga_console_membase =
@ -429,7 +428,8 @@ void __init sn_setup(char **cmdline_p)
* bus containing the VGA console.
*/
if (vga_console_iobase) {
io_space[0].mmio_base = vga_console_iobase;
io_space[0].mmio_base =
(unsigned long) ioremap(vga_console_iobase, 0);
io_space[0].sparse = 0;
}

8
arch/ia64/sn/pci/pcibr/pcibr_dma.c
View File

@ -96,10 +96,14 @@ pcibr_dmamap_ate32(struct pcidev_info *info,
}
/*
* If we're mapping for MSI, set the MSI bit in the ATE
* If we're mapping for MSI, set the MSI bit in the ATE. If it's a
* TIOCP based pci bus, we also need to set the PIO bit in the ATE.
*/
if (dma_flags & SN_DMA_MSI)
if (dma_flags & SN_DMA_MSI) {
ate |= PCI32_ATE_MSI;
if (IS_TIOCP_SOFT(pcibus_info))
ate |= PCI32_ATE_PIO;
}
ate_write(pcibus_info, ate_index, ate_count, ate);

26
arch/mips/Kconfig
View File

@ -250,7 +250,7 @@ config LASAT
select R5000_CPU_SCACHE
select SYS_HAS_CPU_R5000
select SYS_SUPPORTS_32BIT_KERNEL
select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
select SYS_SUPPORTS_LITTLE_ENDIAN
select GENERIC_HARDIRQS_NO__DO_IRQ
@ -470,11 +470,6 @@ config MIPS_XXS1500
select SOC_AU1500
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_V2PCI
bool "Philips PNX8550 based Viper2-PCI board"
select PNX8550
select SYS_SUPPORTS_LITTLE_ENDIAN
config PNX8550_JBS
bool "Philips PNX8550 based JBS board"
select PNX8550
@ -547,6 +542,8 @@ config QEMU
select SYS_SUPPORTS_LITTLE_ENDIAN
select ARCH_SPARSEMEM_ENABLE
select GENERIC_HARDIRQS_NO__DO_IRQ
select NR_CPUS_DEFAULT_1
select SYS_SUPPORTS_SMP
help
Qemu is a software emulator which among other architectures also
can simulate a MIPS32 4Kc system. This patch adds support for the
@ -1564,6 +1561,7 @@ config MIPS_MT_SMP
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_2
select SMP
select SYS_SUPPORTS_SMP
help
@ -1578,7 +1576,6 @@ config MIPS_MT_SMTC
select CPU_MIPSR2_IRQ_VI
select CPU_MIPSR2_SRS
select MIPS_MT
select NR_CPUS_DEFAULT_2
select NR_CPUS_DEFAULT_8
select SMP
select SYS_SUPPORTS_SMP
@ -1609,7 +1606,7 @@ config MIPS_MT_FPAFF
config MIPS_MT_SMTC_INSTANT_REPLAY
bool "Low-latency Dispatch of Deferred SMTC IPIs"
depends on MIPS_MT_SMTC
depends on MIPS_MT_SMTC && !PREEMPT
default y
help
SMTC pseudo-interrupts between TCs are deferred and queued
@ -1810,6 +1807,9 @@ config SMP
config SYS_SUPPORTS_SMP
bool
config NR_CPUS_DEFAULT_1
bool
config NR_CPUS_DEFAULT_2
bool
@ -1830,8 +1830,9 @@ config NR_CPUS_DEFAULT_64
config NR_CPUS
int "Maximum number of CPUs (2-64)"
range 2 64
range 1 64 if NR_CPUS_DEFAULT_1
depends on SMP
default "1" if NR_CPUS_DEFAULT_1
default "2" if NR_CPUS_DEFAULT_2
default "4" if NR_CPUS_DEFAULT_4
default "8" if NR_CPUS_DEFAULT_8
@ -1842,10 +1843,13 @@ config NR_CPUS
This allows you to specify the maximum number of CPUs which this
kernel will support. The maximum supported value is 32 for 32-bit
kernel and 64 for 64-bit kernels; the minimum value which makes
sense is 2.
sense is 1 for Qemu (useful only for kernel debugging purposes)
and 2 for all others.
This is purely to save memory - each supported CPU adds
approximately eight kilobytes to the kernel image.
approximately eight kilobytes to the kernel image. For best
performance should round up your number of processors to the next
power of two.
#
# Timer Interrupt Frequency Configuration

1
arch/mips/configs/atlas_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_ATLAS=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/bigsur_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/capcella_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/cobalt_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_COBALT=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/db1000_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_DB1000=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/db1100_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_DB1100=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/db1200_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_DB1200=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/db1500_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_DB1500=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/db1550_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_DB1550=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/ddb5477_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
CONFIG_DDB5477=y

1
arch/mips/configs/decstation_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MACH_DECSTATION=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/e55_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/emma2rh_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/ev64120_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MIPS_EV64120=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/excite_defconfig
View File

@ -40,7 +40,6 @@ CONFIG_BASLER_EXCITE=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/ip22_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/ip27_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/ip32_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_ZONE_DMA=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/jaguar-atx_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MOMENCO_JAGUAR_ATX=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

1
arch/mips/configs/jazz_defconfig
View File

@ -39,7 +39,6 @@ CONFIG_MACH_JAZZ=y
# CONFIG_MOMENCO_OCELOT_C is not set
# CONFIG_MOMENCO_OCELOT_G is not set
# CONFIG_MIPS_XXS1500 is not set
# CONFIG_PNX8550_V2PCI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_DDB5477 is not set

Some files were not shown because too many files have changed in this diff Show More