drm/i915: Move power well get/put/enable/disable functions to a new file
Move the power well get/put/enable/disable hooks to the new intel_display_power_well.c file. The motivation is to reduce the clutter in intel_display_power.c, keeping the functionality related to power domains in that file and moving the low-level power well functionality to intel_display_power_well.c. No functional change. Suggested-by: Jani Nikula <jani.nikula@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220222165137.1004194-6-imre.deak@intel.com
This commit is contained in:
Imre Deak
parent
314fe7dce4
commit
ef1e170891
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@ -212,6 +212,7 @@ i915-y += \
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display/intel_cursor.o \
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display/intel_display.o \
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display/intel_display_power.o \
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display/intel_display_power_well.o \
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display/intel_dmc.o \
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display/intel_dpio_phy.o \
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display/intel_dpll.o \
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@ -11,6 +11,7 @@
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#include "intel_crt.h"
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#include "intel_de.h"
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#include "intel_display_power.h"
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#include "intel_display_power_well.h"
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#include "intel_display_types.h"
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#include "intel_dmc.h"
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#include "intel_dpio_phy.h"
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@ -26,98 +27,6 @@
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#include "intel_vga.h"
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#include "vlv_sideband.h"
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struct i915_power_well_regs {
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i915_reg_t bios;
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i915_reg_t driver;
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i915_reg_t kvmr;
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i915_reg_t debug;
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};
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struct i915_power_well_ops {
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const struct i915_power_well_regs *regs;
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/*
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* Synchronize the well's hw state to match the current sw state, for
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* example enable/disable it based on the current refcount. Called
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* during driver init and resume time, possibly after first calling
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* the enable/disable handlers.
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*/
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void (*sync_hw)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/*
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* Enable the well and resources that depend on it (for example
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* interrupts located on the well). Called after the 0->1 refcount
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* transition.
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*/
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void (*enable)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/*
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* Disable the well and resources that depend on it. Called after
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* the 1->0 refcount transition.
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*/
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void (*disable)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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/* Returns the hw enabled state. */
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bool (*is_enabled)(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well);
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};
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/* Power well structure for haswell */
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struct i915_power_well_desc {
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const char *name;
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bool always_on;
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u64 domains;
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/* unique identifier for this power well */
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enum i915_power_well_id id;
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/*
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* Arbitraty data associated with this power well. Platform and power
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* well specific.
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*/
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union {
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struct {
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/*
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* request/status flag index in the PUNIT power well
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* control/status registers.
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*/
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u8 idx;
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} vlv;
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struct {
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enum dpio_phy phy;
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} bxt;
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struct {
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/*
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* request/status flag index in the power well
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* constrol/status registers.
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*/
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u8 idx;
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/* Mask of pipes whose IRQ logic is backed by the pw */
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u8 irq_pipe_mask;
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/*
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* Instead of waiting for the status bit to ack enables,
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* just wait a specific amount of time and then consider
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* the well enabled.
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*/
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u16 fixed_enable_delay;
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/* The pw is backing the VGA functionality */
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bool has_vga:1;
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bool has_fuses:1;
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/*
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* The pw is for an ICL+ TypeC PHY port in
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* Thunderbolt mode.
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*/
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bool is_tc_tbt:1;
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} hsw;
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};
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const struct i915_power_well_ops *ops;
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};
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struct i915_power_well {
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const struct i915_power_well_desc *desc;
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/* power well enable/disable usage count */
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int count;
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/* cached hw enabled state */
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bool hw_enabled;
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};
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bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
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enum i915_power_well_id power_well_id);
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@ -259,40 +168,6 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
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}
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}
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static void intel_power_well_enable(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name);
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power_well->desc->ops->enable(dev_priv, power_well);
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power_well->hw_enabled = true;
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}
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static void intel_power_well_disable(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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drm_dbg_kms(&dev_priv->drm, "disabling %s\n", power_well->desc->name);
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power_well->hw_enabled = false;
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power_well->desc->ops->disable(dev_priv, power_well);
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}
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static void intel_power_well_get(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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if (!power_well->count++)
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intel_power_well_enable(dev_priv, power_well);
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}
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static void intel_power_well_put(struct drm_i915_private *dev_priv,
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struct i915_power_well *power_well)
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{
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drm_WARN(&dev_priv->drm, !power_well->count,
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"Use count on power well %s is already zero",
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power_well->desc->name);
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if (!--power_well->count)
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intel_power_well_disable(dev_priv, power_well);
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}
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/**
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* __intel_display_power_is_enabled - unlocked check for a power domain
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* @dev_priv: i915 device instance
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@ -0,0 +1,41 @@
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// SPDX-License-Identifier: MIT
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#include "i915_drv.h"
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#include "intel_display_power_well.h"
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void intel_power_well_enable(struct drm_i915_private *i915,
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struct i915_power_well *power_well)
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{
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drm_dbg_kms(&i915->drm, "enabling %s\n", power_well->desc->name);
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power_well->desc->ops->enable(i915, power_well);
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power_well->hw_enabled = true;
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}
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void intel_power_well_disable(struct drm_i915_private *i915,
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struct i915_power_well *power_well)
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{
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drm_dbg_kms(&i915->drm, "disabling %s\n", power_well->desc->name);
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power_well->hw_enabled = false;
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power_well->desc->ops->disable(i915, power_well);
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}
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void intel_power_well_get(struct drm_i915_private *i915,
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struct i915_power_well *power_well)
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{
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if (!power_well->count++)
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intel_power_well_enable(i915, power_well);
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}
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void intel_power_well_put(struct drm_i915_private *i915,
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struct i915_power_well *power_well)
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{
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drm_WARN(&i915->drm, !power_well->count,
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"Use count on power well %s is already zero",
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power_well->desc->name);
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if (!--power_well->count)
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intel_power_well_disable(i915, power_well);
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}
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@ -0,0 +1,115 @@
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/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2022 Intel Corporation
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*/
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#ifndef __INTEL_DISPLAY_POWER_WELL_H__
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#define __INTEL_DISPLAY_POWER_WELL_H__
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#include <linux/types.h>
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#include "intel_display.h"
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#include "intel_display_power.h"
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struct drm_i915_private;
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struct i915_power_well_regs {
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i915_reg_t bios;
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i915_reg_t driver;
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i915_reg_t kvmr;
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i915_reg_t debug;
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};
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struct i915_power_well_ops {
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const struct i915_power_well_regs *regs;
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/*
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* Synchronize the well's hw state to match the current sw state, for
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* example enable/disable it based on the current refcount. Called
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* during driver init and resume time, possibly after first calling
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* the enable/disable handlers.
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*/
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void (*sync_hw)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/*
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* Enable the well and resources that depend on it (for example
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* interrupts located on the well). Called after the 0->1 refcount
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* transition.
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*/
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void (*enable)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/*
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* Disable the well and resources that depend on it. Called after
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* the 1->0 refcount transition.
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*/
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void (*disable)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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/* Returns the hw enabled state. */
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bool (*is_enabled)(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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};
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struct i915_power_well_desc {
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const char *name;
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bool always_on;
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u64 domains;
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/* unique identifier for this power well */
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enum i915_power_well_id id;
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/*
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* Arbitraty data associated with this power well. Platform and power
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* well specific.
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*/
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union {
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struct {
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/*
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* request/status flag index in the PUNIT power well
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* control/status registers.
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*/
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u8 idx;
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} vlv;
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struct {
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enum dpio_phy phy;
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} bxt;
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struct {
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/*
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* request/status flag index in the power well
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* constrol/status registers.
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*/
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u8 idx;
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/* Mask of pipes whose IRQ logic is backed by the pw */
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u8 irq_pipe_mask;
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/*
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* Instead of waiting for the status bit to ack enables,
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* just wait a specific amount of time and then consider
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* the well enabled.
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*/
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u16 fixed_enable_delay;
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/* The pw is backing the VGA functionality */
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bool has_vga:1;
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bool has_fuses:1;
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/*
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* The pw is for an ICL+ TypeC PHY port in
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* Thunderbolt mode.
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*/
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bool is_tc_tbt:1;
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} hsw;
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};
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const struct i915_power_well_ops *ops;
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};
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struct i915_power_well {
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const struct i915_power_well_desc *desc;
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/* power well enable/disable usage count */
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int count;
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/* cached hw enabled state */
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bool hw_enabled;
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};
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void intel_power_well_enable(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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void intel_power_well_disable(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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void intel_power_well_get(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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void intel_power_well_put(struct drm_i915_private *i915,
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struct i915_power_well *power_well);
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#endif
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