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net: lan966x: Add registers that are used for switch and vlan functionality 

This patch adds the registers that will be used to enable switchdev and
vlan functionality in the HW.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Horatiu Vultur 2021-12-18 22:49:38 +01:00 committed by David S. Miller
parent 5f89b38900
commit ef14049f4d
1 changed files with 129 additions and 0 deletions
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129
drivers/net/ethernet/microchip/lan966x/lan966x_regs.h
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@ -61,6 +61,9 @@ enum lan966x_target {
#define ANA_ADVLEARN_VLAN_CHK_GET(x)\
FIELD_GET(ANA_ADVLEARN_VLAN_CHK, x)
/* ANA:ANA:VLANMASK */
#define ANA_VLANMASK __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 8, 0, 1, 4)
/* ANA:ANA:ANAINTR */
#define ANA_ANAINTR __REG(TARGET_ANA, 0, 1, 29824, 0, 1, 244, 16, 0, 1, 4)
@ -184,6 +187,102 @@ enum lan966x_target {
#define ANA_MACACCESS_MAC_TABLE_CMD_GET(x)\
FIELD_GET(ANA_MACACCESS_MAC_TABLE_CMD, x)
/* ANA:ANA_TABLES:MACTINDX */
#define ANA_MACTINDX __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 52, 0, 1, 4)
#define ANA_MACTINDX_BUCKET GENMASK(12, 11)
#define ANA_MACTINDX_BUCKET_SET(x)\
FIELD_PREP(ANA_MACTINDX_BUCKET, x)
#define ANA_MACTINDX_BUCKET_GET(x)\
FIELD_GET(ANA_MACTINDX_BUCKET, x)
#define ANA_MACTINDX_M_INDEX GENMASK(10, 0)
#define ANA_MACTINDX_M_INDEX_SET(x)\
FIELD_PREP(ANA_MACTINDX_M_INDEX, x)
#define ANA_MACTINDX_M_INDEX_GET(x)\
FIELD_GET(ANA_MACTINDX_M_INDEX, x)
/* ANA:ANA_TABLES:VLAN_PORT_MASK */
#define ANA_VLAN_PORT_MASK __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 56, 0, 1, 4)
#define ANA_VLAN_PORT_MASK_VLAN_PORT_MASK GENMASK(8, 0)
#define ANA_VLAN_PORT_MASK_VLAN_PORT_MASK_SET(x)\
FIELD_PREP(ANA_VLAN_PORT_MASK_VLAN_PORT_MASK, x)
#define ANA_VLAN_PORT_MASK_VLAN_PORT_MASK_GET(x)\
FIELD_GET(ANA_VLAN_PORT_MASK_VLAN_PORT_MASK, x)
/* ANA:ANA_TABLES:VLANACCESS */
#define ANA_VLANACCESS __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 60, 0, 1, 4)
#define ANA_VLANACCESS_VLAN_TBL_CMD GENMASK(1, 0)
#define ANA_VLANACCESS_VLAN_TBL_CMD_SET(x)\
FIELD_PREP(ANA_VLANACCESS_VLAN_TBL_CMD, x)
#define ANA_VLANACCESS_VLAN_TBL_CMD_GET(x)\
FIELD_GET(ANA_VLANACCESS_VLAN_TBL_CMD, x)
/* ANA:ANA_TABLES:VLANTIDX */
#define ANA_VLANTIDX __REG(TARGET_ANA, 0, 1, 27520, 0, 1, 128, 64, 0, 1, 4)
#define ANA_VLANTIDX_VLAN_PGID_CPU_DIS BIT(18)
#define ANA_VLANTIDX_VLAN_PGID_CPU_DIS_SET(x)\
FIELD_PREP(ANA_VLANTIDX_VLAN_PGID_CPU_DIS, x)
#define ANA_VLANTIDX_VLAN_PGID_CPU_DIS_GET(x)\
FIELD_GET(ANA_VLANTIDX_VLAN_PGID_CPU_DIS, x)
#define ANA_VLANTIDX_V_INDEX GENMASK(11, 0)
#define ANA_VLANTIDX_V_INDEX_SET(x)\
FIELD_PREP(ANA_VLANTIDX_V_INDEX, x)
#define ANA_VLANTIDX_V_INDEX_GET(x)\
FIELD_GET(ANA_VLANTIDX_V_INDEX, x)
/* ANA:PORT:VLAN_CFG */
#define ANA_VLAN_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 0, 0, 1, 4)
#define ANA_VLAN_CFG_VLAN_AWARE_ENA BIT(20)
#define ANA_VLAN_CFG_VLAN_AWARE_ENA_SET(x)\
FIELD_PREP(ANA_VLAN_CFG_VLAN_AWARE_ENA, x)
#define ANA_VLAN_CFG_VLAN_AWARE_ENA_GET(x)\
FIELD_GET(ANA_VLAN_CFG_VLAN_AWARE_ENA, x)
#define ANA_VLAN_CFG_VLAN_POP_CNT GENMASK(19, 18)
#define ANA_VLAN_CFG_VLAN_POP_CNT_SET(x)\
FIELD_PREP(ANA_VLAN_CFG_VLAN_POP_CNT, x)
#define ANA_VLAN_CFG_VLAN_POP_CNT_GET(x)\
FIELD_GET(ANA_VLAN_CFG_VLAN_POP_CNT, x)
#define ANA_VLAN_CFG_VLAN_VID GENMASK(11, 0)
#define ANA_VLAN_CFG_VLAN_VID_SET(x)\
FIELD_PREP(ANA_VLAN_CFG_VLAN_VID, x)
#define ANA_VLAN_CFG_VLAN_VID_GET(x)\
FIELD_GET(ANA_VLAN_CFG_VLAN_VID, x)
/* ANA:PORT:DROP_CFG */
#define ANA_DROP_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 4, 0, 1, 4)
#define ANA_DROP_CFG_DROP_UNTAGGED_ENA BIT(6)
#define ANA_DROP_CFG_DROP_UNTAGGED_ENA_SET(x)\
FIELD_PREP(ANA_DROP_CFG_DROP_UNTAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_UNTAGGED_ENA_GET(x)\
FIELD_GET(ANA_DROP_CFG_DROP_UNTAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA BIT(3)
#define ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA_SET(x)\
FIELD_PREP(ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA_GET(x)\
FIELD_GET(ANA_DROP_CFG_DROP_PRIO_S_TAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA BIT(2)
#define ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA_SET(x)\
FIELD_PREP(ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA_GET(x)\
FIELD_GET(ANA_DROP_CFG_DROP_PRIO_C_TAGGED_ENA, x)
#define ANA_DROP_CFG_DROP_MC_SMAC_ENA BIT(0)
#define ANA_DROP_CFG_DROP_MC_SMAC_ENA_SET(x)\
FIELD_PREP(ANA_DROP_CFG_DROP_MC_SMAC_ENA, x)
#define ANA_DROP_CFG_DROP_MC_SMAC_ENA_GET(x)\
FIELD_GET(ANA_DROP_CFG_DROP_MC_SMAC_ENA, x)
/* ANA:PORT:CPU_FWD_CFG */
#define ANA_CPU_FWD_CFG(g) __REG(TARGET_ANA, 0, 1, 28672, g, 9, 128, 96, 0, 1, 4)
@ -589,6 +688,36 @@ enum lan966x_target {
/* QSYS:RES_CTRL:RES_CFG */
#define QSYS_RES_CFG(g) __REG(TARGET_QSYS, 0, 1, 32768, g, 1024, 8, 0, 0, 1, 4)
/* REW:PORT:PORT_VLAN_CFG */
#define REW_PORT_VLAN_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 0, 0, 1, 4)
#define REW_PORT_VLAN_CFG_PORT_TPID GENMASK(31, 16)
#define REW_PORT_VLAN_CFG_PORT_TPID_SET(x)\
FIELD_PREP(REW_PORT_VLAN_CFG_PORT_TPID, x)
#define REW_PORT_VLAN_CFG_PORT_TPID_GET(x)\
FIELD_GET(REW_PORT_VLAN_CFG_PORT_TPID, x)
#define REW_PORT_VLAN_CFG_PORT_VID GENMASK(11, 0)
#define REW_PORT_VLAN_CFG_PORT_VID_SET(x)\
FIELD_PREP(REW_PORT_VLAN_CFG_PORT_VID, x)
#define REW_PORT_VLAN_CFG_PORT_VID_GET(x)\
FIELD_GET(REW_PORT_VLAN_CFG_PORT_VID, x)
/* REW:PORT:TAG_CFG */
#define REW_TAG_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 4, 0, 1, 4)
#define REW_TAG_CFG_TAG_CFG GENMASK(8, 7)
#define REW_TAG_CFG_TAG_CFG_SET(x)\
FIELD_PREP(REW_TAG_CFG_TAG_CFG, x)
#define REW_TAG_CFG_TAG_CFG_GET(x)\
FIELD_GET(REW_TAG_CFG_TAG_CFG, x)
#define REW_TAG_CFG_TAG_TPID_CFG GENMASK(6, 5)
#define REW_TAG_CFG_TAG_TPID_CFG_SET(x)\
FIELD_PREP(REW_TAG_CFG_TAG_TPID_CFG, x)
#define REW_TAG_CFG_TAG_TPID_CFG_GET(x)\
FIELD_GET(REW_TAG_CFG_TAG_TPID_CFG, x)
/* REW:PORT:PORT_CFG */
#define REW_PORT_CFG(g) __REG(TARGET_REW, 0, 1, 0, g, 10, 128, 8, 0, 1, 4)