xhci: Add a quirk for writing ERST in high-low order
[ Upstream commit bc162403e33e1d57e40994977acaf19f1434e460 ] This quirk is for the controller that has a limitation in supporting separate ERSTBA_HI and ERSTBA_LO programming. It's supported when the ERSTBA is programmed ERSTBA_HI before ERSTBA_LO. That's because the internal initialization of event ring fetches the "Event Ring Segment Table Entry" based on the indication of ERSTBA_LO written. Signed-off-by: Daehwan Jung <dh10.jung@samsung.com> Link: https://lore.kernel.org/r/1718019553-111939-3-git-send-email-dh10.jung@samsung.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Stable-dep-of: e5fa8db0be3e ("usb: xhci: fix loss of data on Cadence xHC") Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -2289,7 +2289,10 @@ xhci_add_interrupter(struct xhci_hcd *xhci, struct xhci_interrupter *ir,
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erst_base = xhci_read_64(xhci, &ir->ir_set->erst_base);
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erst_base &= ERST_BASE_RSVDP;
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erst_base |= ir->erst.erst_dma_addr & ~ERST_BASE_RSVDP;
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xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base);
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if (xhci->quirks & XHCI_WRITE_64_HI_LO)
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hi_lo_writeq(erst_base, &ir->ir_set->erst_base);
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else
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xhci_write_64(xhci, erst_base, &ir->ir_set->erst_base);
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/* Set the event ring dequeue address of this interrupter */
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xhci_set_hc_event_deq(xhci, ir);
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@ -17,6 +17,7 @@
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#include <linux/kernel.h>
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#include <linux/usb/hcd.h>
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#include <linux/io-64-nonatomic-lo-hi.h>
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#include <linux/io-64-nonatomic-hi-lo.h>
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/* Code sharing between pci-quirks and xhci hcd */
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#include "xhci-ext-caps.h"
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@ -1913,6 +1914,7 @@ struct xhci_hcd {
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#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
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#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
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#define XHCI_ZHAOXIN_HOST BIT_ULL(46)
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#define XHCI_WRITE_64_HI_LO BIT_ULL(47)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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