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drm/i915: Always perform internal fixed16 division in 64 bits 

This patch combines fixed_16_16_div & fixed_16_16_div_u64 wrappers.
And new fixed_16_16_div wrapper always performs division operation in
u64 internally, to avoid any data loss which was happening in earlier
version of wrapper.
earlier wrapper was converting u32 to fixed16 in 32 bit so we were
losing 16-MSB data.

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/20170705143154.32132-3-mahesh1.kumar@intel.com
[mlankhorst: Fix typo in commit message.]
This commit is contained in:
Kumar, Mahesh 2017-07-05 20:01:45 +05:30 committed by Maarten Lankhorst
parent 07ab976d19
commit eed02a7b53
2 changed files with 2 additions and 11 deletions
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9
drivers/gpu/drm/i915/i915_drv.h
View File

@ -196,15 +196,6 @@ static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
}
static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d)
{
uint_fixed_16_16_t fp, res;
fp = u32_to_fixed_16_16(val);
res.val = DIV_ROUND_UP(fp.val, d);
return res;
}
static inline uint_fixed_16_16_t fixed_16_16_div_u64(uint32_t val, uint32_t d)
{
uint64_t interm_val;

4
drivers/gpu/drm/i915/intel_pm.c
View File

@ -4276,7 +4276,7 @@ static uint_fixed_16_16_t skl_wm_method1(uint32_t pixel_rate, uint8_t cpp,
return FP_16_16_MAX;
wm_intermediate_val = latency * pixel_rate * cpp;
ret = fixed_16_16_div_u64(wm_intermediate_val, 1000 * 512);
ret = fixed_16_16_div(wm_intermediate_val, 1000 * 512);
return ret;
}
@ -4314,7 +4314,7 @@ intel_get_linetime_us(struct intel_crtc_state *cstate)
return u32_to_fixed_16_16(0);
crtc_htotal = cstate->base.adjusted_mode.crtc_htotal;
linetime_us = fixed_16_16_div_u64(crtc_htotal * 1000, pixel_rate);
linetime_us = fixed_16_16_div(crtc_htotal * 1000, pixel_rate);
return linetime_us;
}