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igb: support BCM54616 PHY 

The management port on an Edgecore AS7712-32 switch uses an igb MAC, but
it uses a BCM54616 PHY. Without a patch like this, loading the igb
module produces dmesg output like this:

[    3.439125] igb: Copyright (c) 2007-2014 Intel Corporation.
[    3.439866] igb: probe of 0000:00:14.0 failed with error -2

Signed-off-by: John W Linville <linville@tuxdriver.com>
Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
John W Linville 2017-07-21 14:12:24 -04:00 committed by Jeff Kirsher
parent d466124860
commit eeb0149660
3 changed files with 8 additions and 0 deletions
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6
drivers/net/ethernet/intel/igb/e1000_82575.c
View File

@ -340,6 +340,9 @@ static s32 igb_init_phy_params_82575(struct e1000_hw *hw)
phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580; phy->ops.set_d3_lplu_state = igb_set_d3_lplu_state_82580;
phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88; phy->ops.force_speed_duplex = igb_phy_force_speed_duplex_m88;
break; break;
case BCM54616_E_PHY_ID:
phy->type = e1000_phy_bcm54616;
break;
default: default:
ret_val = -E1000_ERR_PHY; ret_val = -E1000_ERR_PHY;
goto out; goto out;
@ -1659,6 +1662,9 @@ static s32 igb_setup_copper_link_82575(struct e1000_hw *hw)
case e1000_phy_82580: case e1000_phy_82580:
ret_val = igb_copper_link_setup_82580(hw); ret_val = igb_copper_link_setup_82580(hw);
break; break;
case e1000_phy_bcm54616:
ret_val = 0;
break;
default: default:
ret_val = -E1000_ERR_PHY; ret_val = -E1000_ERR_PHY;
break; break;

1
drivers/net/ethernet/intel/igb/e1000_defines.h
View File

@ -889,6 +889,7 @@
#define I210_I_PHY_ID 0x01410C00 #define I210_I_PHY_ID 0x01410C00
#define M88E1543_E_PHY_ID 0x01410EA0 #define M88E1543_E_PHY_ID 0x01410EA0
#define M88E1512_E_PHY_ID 0x01410DD0 #define M88E1512_E_PHY_ID 0x01410DD0
#define BCM54616_E_PHY_ID 0x03625D10
/* M88E1000 Specific Registers */ /* M88E1000 Specific Registers */
#define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */ #define M88E1000_PHY_SPEC_CTRL 0x10 /* PHY Specific Control Register */

1
drivers/net/ethernet/intel/igb/e1000_hw.h
View File

@ -128,6 +128,7 @@ enum e1000_phy_type {
e1000_phy_ife, e1000_phy_ife,
e1000_phy_82580, e1000_phy_82580,
e1000_phy_i210, e1000_phy_i210,
e1000_phy_bcm54616,
}; };
enum e1000_bus_type { enum e1000_bus_type {