x86/apic: Allow apic::wait_icr_idle() to be NULL
Nuke more NOOP callbacks and make the invocation conditional. Will be replaced with a static call later. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Michael Kelley <mikelley@microsoft.com> Tested-by: Sohil Mehta <sohil.mehta@intel.com> Tested-by: Juergen Gross <jgross@suse.com> # Xen PV (dom0 and unpriv. guest)
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@ -206,12 +206,6 @@ static inline u32 native_apic_msr_read(u32 reg)
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return (u32)msr;
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}
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static inline void native_x2apic_wait_icr_idle(void)
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{
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/* no need to wait for icr idle in x2apic */
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return;
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}
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static inline u32 native_safe_x2apic_wait_icr_idle(void)
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{
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/* no need to wait for icr idle in x2apic */
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@ -376,7 +370,8 @@ static inline void apic_icr_write(u32 low, u32 high)
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static inline void apic_wait_icr_idle(void)
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{
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apic->wait_icr_idle();
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if (apic->wait_icr_idle)
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apic->wait_icr_idle();
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}
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static inline u32 safe_apic_wait_icr_idle(void)
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@ -20,7 +20,6 @@ static void noop_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vec
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static void noop_send_IPI_allbutself(int vector) { }
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static void noop_send_IPI_all(int vector) { }
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static void noop_send_IPI_self(int vector) { }
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static void noop_apic_wait_icr_idle(void) { }
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static void noop_apic_icr_write(u32 low, u32 id) { }
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static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip)
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@ -105,6 +104,5 @@ struct apic apic_noop __ro_after_init = {
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.eoi_write = noop_apic_write,
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.icr_read = noop_apic_icr_read,
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.icr_write = noop_apic_icr_write,
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.wait_icr_idle = noop_apic_wait_icr_idle,
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.safe_wait_icr_idle = noop_safe_apic_wait_icr_idle,
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};
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@ -223,11 +223,6 @@ static int numachip2_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
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return 1;
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}
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/* APIC IPIs are queued */
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static void numachip_apic_wait_icr_idle(void)
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{
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}
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/* APIC NMI IPIs are queued */
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static u32 numachip_safe_apic_wait_icr_idle(void)
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{
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@ -269,7 +264,6 @@ static const struct apic apic_numachip1 __refconst = {
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.eoi_write = native_apic_mem_write,
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.icr_read = native_apic_icr_read,
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.icr_write = native_apic_icr_write,
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.wait_icr_idle = numachip_apic_wait_icr_idle,
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.safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle,
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};
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@ -310,7 +304,6 @@ static const struct apic apic_numachip2 __refconst = {
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.eoi_write = native_apic_mem_write,
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.icr_read = native_apic_icr_read,
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.icr_write = native_apic_icr_write,
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.wait_icr_idle = numachip_apic_wait_icr_idle,
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.safe_wait_icr_idle = numachip_safe_apic_wait_icr_idle,
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};
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@ -266,7 +266,6 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
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.eoi_write = native_apic_msr_eoi_write,
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.icr_read = native_x2apic_icr_read,
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.icr_write = native_x2apic_icr_write,
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.wait_icr_idle = native_x2apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
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};
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@ -180,7 +180,6 @@ static struct apic apic_x2apic_phys __ro_after_init = {
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.eoi_write = native_apic_msr_eoi_write,
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.icr_read = native_x2apic_icr_read,
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.icr_write = native_x2apic_icr_write,
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.wait_icr_idle = native_x2apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
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};
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@ -854,7 +854,6 @@ static struct apic apic_x2apic_uv_x __ro_after_init = {
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.eoi_write = native_apic_msr_eoi_write,
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.icr_read = native_x2apic_icr_read,
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.icr_write = native_x2apic_icr_write,
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.wait_icr_idle = native_x2apic_wait_icr_idle,
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.safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
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};
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@ -120,10 +120,6 @@ static int xen_phys_pkg_id(int initial_apic_id, int index_msb)
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return initial_apic_id >> index_msb;
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}
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static void xen_noop(void)
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{
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}
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static int xen_cpu_present_to_apicid(int cpu)
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{
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if (cpu_present(cpu))
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@ -165,7 +161,6 @@ static struct apic xen_pv_apic = {
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.icr_read = xen_apic_icr_read,
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.icr_write = xen_apic_icr_write,
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.wait_icr_idle = xen_noop,
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.safe_wait_icr_idle = xen_safe_apic_wait_icr_idle,
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};
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