x86/compressed/64: Add support for SEV-SNP CPUID table in #VC handlers
CPUID instructions generate a #VC exception for SEV-ES/SEV-SNP guests, for which early handlers are currently set up to handle. In the case of SEV-SNP, guests can use a configurable location in guest memory that has been pre-populated with a firmware-validated CPUID table to look up the relevant CPUID values rather than requesting them from hypervisor via a VMGEXIT. Add the various hooks in the #VC handlers to allow CPUID instructions to be handled via the table. The code to actually configure/enable the table will be added in a subsequent commit. Signed-off-by: Michael Roth <michael.roth@amd.com> Signed-off-by: Brijesh Singh <brijesh.singh@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20220307213356.2797205-33-brijesh.singh@amd.com
This commit is contained in:
Michael Roth
Borislav Petkov
parent
801baa693c
commit
ee0bfa08a3
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@ -152,6 +152,8 @@ struct snp_psc_desc {
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#define GHCB_TERM_PSC 1 /* Page State Change failure */
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#define GHCB_TERM_PVALIDATE 2 /* Pvalidate failure */
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#define GHCB_TERM_NOT_VMPL0 3 /* SNP guest is not running at VMPL-0 */
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#define GHCB_TERM_CPUID 4 /* CPUID-validation failure */
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#define GHCB_TERM_CPUID_HV 5 /* CPUID failure during hypervisor fallback */
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#define GHCB_RESP_CODE(v) ((v) & GHCB_MSR_INFO_MASK)
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@ -24,6 +24,36 @@ struct cpuid_leaf {
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u32 edx;
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};
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/*
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* Individual entries of the SNP CPUID table, as defined by the SNP
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* Firmware ABI, Revision 0.9, Section 7.1, Table 14.
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*/
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struct snp_cpuid_fn {
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u32 eax_in;
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u32 ecx_in;
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u64 xcr0_in;
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u64 xss_in;
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u32 eax;
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u32 ebx;
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u32 ecx;
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u32 edx;
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u64 __reserved;
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} __packed;
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/*
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* SNP CPUID table, as defined by the SNP Firmware ABI, Revision 0.9,
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* Section 8.14.2.6. Also noted there is the SNP firmware-enforced limit
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* of 64 entries per CPUID table.
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*/
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#define SNP_CPUID_COUNT_MAX 64
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struct snp_cpuid_table {
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u32 count;
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u32 __reserved1;
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u64 __reserved2;
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struct snp_cpuid_fn fn[SNP_CPUID_COUNT_MAX];
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} __packed;
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/*
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* Since feature negotiation related variables are set early in the boot
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* process they must reside in the .data section so as not to be zeroed
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@ -33,6 +63,19 @@ struct cpuid_leaf {
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*/
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static u16 ghcb_version __ro_after_init;
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/* Copy of the SNP firmware's CPUID page. */
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static struct snp_cpuid_table cpuid_table_copy __ro_after_init;
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/*
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* These will be initialized based on CPUID table so that non-present
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* all-zero leaves (for sparse tables) can be differentiated from
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* invalid/out-of-range leaves. This is needed since all-zero leaves
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* still need to be post-processed.
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*/
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static u32 cpuid_std_range_max __ro_after_init;
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static u32 cpuid_hyp_range_max __ro_after_init;
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static u32 cpuid_ext_range_max __ro_after_init;
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static bool __init sev_es_check_cpu_features(void)
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{
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if (!has_cpuflag(X86_FEATURE_RDRAND)) {
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@ -242,6 +285,252 @@ static int sev_cpuid_hv(struct cpuid_leaf *leaf)
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return ret;
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}
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/*
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* This may be called early while still running on the initial identity
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* mapping. Use RIP-relative addressing to obtain the correct address
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* while running with the initial identity mapping as well as the
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* switch-over to kernel virtual addresses later.
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*/
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static const struct snp_cpuid_table *snp_cpuid_get_table(void)
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{
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void *ptr;
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asm ("lea cpuid_table_copy(%%rip), %0"
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: "=r" (ptr)
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: "p" (&cpuid_table_copy));
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return ptr;
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}
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/*
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* The SNP Firmware ABI, Revision 0.9, Section 7.1, details the use of
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* XCR0_IN and XSS_IN to encode multiple versions of 0xD subfunctions 0
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* and 1 based on the corresponding features enabled by a particular
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* combination of XCR0 and XSS registers so that a guest can look up the
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* version corresponding to the features currently enabled in its XCR0/XSS
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* registers. The only values that differ between these versions/table
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* entries is the enabled XSAVE area size advertised via EBX.
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*
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* While hypervisors may choose to make use of this support, it is more
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* robust/secure for a guest to simply find the entry corresponding to the
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* base/legacy XSAVE area size (XCR0=1 or XCR0=3), and then calculate the
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* XSAVE area size using subfunctions 2 through 64, as documented in APM
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* Volume 3, Rev 3.31, Appendix E.3.8, which is what is done here.
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*
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* Since base/legacy XSAVE area size is documented as 0x240, use that value
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* directly rather than relying on the base size in the CPUID table.
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*
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* Return: XSAVE area size on success, 0 otherwise.
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*/
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static u32 snp_cpuid_calc_xsave_size(u64 xfeatures_en, bool compacted)
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{
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const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
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u64 xfeatures_found = 0;
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u32 xsave_size = 0x240;
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int i;
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for (i = 0; i < cpuid_table->count; i++) {
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const struct snp_cpuid_fn *e = &cpuid_table->fn[i];
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if (!(e->eax_in == 0xD && e->ecx_in > 1 && e->ecx_in < 64))
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continue;
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if (!(xfeatures_en & (BIT_ULL(e->ecx_in))))
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continue;
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if (xfeatures_found & (BIT_ULL(e->ecx_in)))
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continue;
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xfeatures_found |= (BIT_ULL(e->ecx_in));
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if (compacted)
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xsave_size += e->eax;
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else
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xsave_size = max(xsave_size, e->eax + e->ebx);
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}
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/*
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* Either the guest set unsupported XCR0/XSS bits, or the corresponding
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* entries in the CPUID table were not present. This is not a valid
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* state to be in.
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*/
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if (xfeatures_found != (xfeatures_en & GENMASK_ULL(63, 2)))
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return 0;
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return xsave_size;
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}
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static bool
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snp_cpuid_get_validated_func(struct cpuid_leaf *leaf)
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{
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const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
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int i;
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for (i = 0; i < cpuid_table->count; i++) {
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const struct snp_cpuid_fn *e = &cpuid_table->fn[i];
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if (e->eax_in != leaf->fn)
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continue;
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if (cpuid_function_is_indexed(leaf->fn) && e->ecx_in != leaf->subfn)
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continue;
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/*
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* For 0xD subfunctions 0 and 1, only use the entry corresponding
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* to the base/legacy XSAVE area size (XCR0=1 or XCR0=3, XSS=0).
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* See the comments above snp_cpuid_calc_xsave_size() for more
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* details.
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*/
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if (e->eax_in == 0xD && (e->ecx_in == 0 || e->ecx_in == 1))
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if (!(e->xcr0_in == 1 || e->xcr0_in == 3) || e->xss_in)
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continue;
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leaf->eax = e->eax;
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leaf->ebx = e->ebx;
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leaf->ecx = e->ecx;
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leaf->edx = e->edx;
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return true;
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}
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return false;
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}
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static void snp_cpuid_hv(struct cpuid_leaf *leaf)
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{
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if (sev_cpuid_hv(leaf))
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sev_es_terminate(SEV_TERM_SET_LINUX, GHCB_TERM_CPUID_HV);
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}
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static int snp_cpuid_postprocess(struct cpuid_leaf *leaf)
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{
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struct cpuid_leaf leaf_hv = *leaf;
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switch (leaf->fn) {
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case 0x1:
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snp_cpuid_hv(&leaf_hv);
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/* initial APIC ID */
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leaf->ebx = (leaf_hv.ebx & GENMASK(31, 24)) | (leaf->ebx & GENMASK(23, 0));
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/* APIC enabled bit */
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leaf->edx = (leaf_hv.edx & BIT(9)) | (leaf->edx & ~BIT(9));
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/* OSXSAVE enabled bit */
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if (native_read_cr4() & X86_CR4_OSXSAVE)
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leaf->ecx |= BIT(27);
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break;
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case 0x7:
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/* OSPKE enabled bit */
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leaf->ecx &= ~BIT(4);
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if (native_read_cr4() & X86_CR4_PKE)
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leaf->ecx |= BIT(4);
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break;
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case 0xB:
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leaf_hv.subfn = 0;
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snp_cpuid_hv(&leaf_hv);
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/* extended APIC ID */
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leaf->edx = leaf_hv.edx;
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break;
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case 0xD: {
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bool compacted = false;
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u64 xcr0 = 1, xss = 0;
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u32 xsave_size;
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if (leaf->subfn != 0 && leaf->subfn != 1)
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return 0;
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if (native_read_cr4() & X86_CR4_OSXSAVE)
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xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
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if (leaf->subfn == 1) {
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/* Get XSS value if XSAVES is enabled. */
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if (leaf->eax & BIT(3)) {
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unsigned long lo, hi;
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asm volatile("rdmsr" : "=a" (lo), "=d" (hi)
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: "c" (MSR_IA32_XSS));
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xss = (hi << 32) | lo;
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}
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/*
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* The PPR and APM aren't clear on what size should be
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* encoded in 0xD:0x1:EBX when compaction is not enabled
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* by either XSAVEC (feature bit 1) or XSAVES (feature
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* bit 3) since SNP-capable hardware has these feature
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* bits fixed as 1. KVM sets it to 0 in this case, but
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* to avoid this becoming an issue it's safer to simply
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* treat this as unsupported for SNP guests.
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*/
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if (!(leaf->eax & (BIT(1) | BIT(3))))
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return -EINVAL;
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compacted = true;
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}
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xsave_size = snp_cpuid_calc_xsave_size(xcr0 | xss, compacted);
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if (!xsave_size)
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return -EINVAL;
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leaf->ebx = xsave_size;
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}
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break;
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case 0x8000001E:
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snp_cpuid_hv(&leaf_hv);
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/* extended APIC ID */
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leaf->eax = leaf_hv.eax;
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/* compute ID */
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leaf->ebx = (leaf->ebx & GENMASK(31, 8)) | (leaf_hv.ebx & GENMASK(7, 0));
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/* node ID */
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leaf->ecx = (leaf->ecx & GENMASK(31, 8)) | (leaf_hv.ecx & GENMASK(7, 0));
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break;
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default:
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/* No fix-ups needed, use values as-is. */
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break;
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}
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return 0;
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}
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/*
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* Returns -EOPNOTSUPP if feature not enabled. Any other non-zero return value
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* should be treated as fatal by caller.
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*/
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static int snp_cpuid(struct cpuid_leaf *leaf)
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{
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const struct snp_cpuid_table *cpuid_table = snp_cpuid_get_table();
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if (!cpuid_table->count)
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return -EOPNOTSUPP;
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if (!snp_cpuid_get_validated_func(leaf)) {
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/*
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* Some hypervisors will avoid keeping track of CPUID entries
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* where all values are zero, since they can be handled the
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* same as out-of-range values (all-zero). This is useful here
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* as well as it allows virtually all guest configurations to
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* work using a single SNP CPUID table.
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*
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* To allow for this, there is a need to distinguish between
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* out-of-range entries and in-range zero entries, since the
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* CPUID table entries are only a template that may need to be
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* augmented with additional values for things like
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* CPU-specific information during post-processing. So if it's
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* not in the table, set the values to zero. Then, if they are
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* within a valid CPUID range, proceed with post-processing
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* using zeros as the initial values. Otherwise, skip
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* post-processing and just return zeros immediately.
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*/
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leaf->eax = leaf->ebx = leaf->ecx = leaf->edx = 0;
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/* Skip post-processing for out-of-range zero leafs. */
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if (!(leaf->fn <= cpuid_std_range_max ||
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(leaf->fn >= 0x40000000 && leaf->fn <= cpuid_hyp_range_max) ||
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(leaf->fn >= 0x80000000 && leaf->fn <= cpuid_ext_range_max)))
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return 0;
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}
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return snp_cpuid_postprocess(leaf);
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}
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/*
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* Boot VC Handler - This is the first VC handler during boot, there is no GHCB
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* page yet, so it only supports the MSR based communication with the
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@ -252,6 +541,7 @@ void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
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unsigned int subfn = lower_bits(regs->cx, 32);
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unsigned int fn = lower_bits(regs->ax, 32);
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struct cpuid_leaf leaf;
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int ret;
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/* Only CPUID is supported via MSR protocol */
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if (exit_code != SVM_EXIT_CPUID)
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@ -259,9 +549,18 @@ void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned long exit_code)
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leaf.fn = fn;
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leaf.subfn = subfn;
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ret = snp_cpuid(&leaf);
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if (!ret)
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goto cpuid_done;
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if (ret != -EOPNOTSUPP)
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goto fail;
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if (sev_cpuid_hv(&leaf))
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goto fail;
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cpuid_done:
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regs->ax = leaf.eax;
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regs->bx = leaf.ebx;
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regs->cx = leaf.ecx;
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@ -556,12 +855,37 @@ static enum es_result vc_handle_ioio(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
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return ret;
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}
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static int vc_handle_cpuid_snp(struct pt_regs *regs)
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{
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struct cpuid_leaf leaf;
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int ret;
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leaf.fn = regs->ax;
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leaf.subfn = regs->cx;
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ret = snp_cpuid(&leaf);
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if (!ret) {
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regs->ax = leaf.eax;
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regs->bx = leaf.ebx;
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regs->cx = leaf.ecx;
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regs->dx = leaf.edx;
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}
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return ret;
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}
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static enum es_result vc_handle_cpuid(struct ghcb *ghcb,
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struct es_em_ctxt *ctxt)
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{
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struct pt_regs *regs = ctxt->regs;
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u32 cr4 = native_read_cr4();
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enum es_result ret;
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int snp_cpuid_ret;
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snp_cpuid_ret = vc_handle_cpuid_snp(regs);
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if (!snp_cpuid_ret)
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return ES_OK;
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if (snp_cpuid_ret != -EOPNOTSUPP)
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return ES_VMM_ERROR;
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ghcb_set_rax(ghcb, regs->ax);
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ghcb_set_rcx(ghcb, regs->cx);
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