drivers/thermal/rcar_gen3_thermal: add reading fuses for Gen4
The registers are differently named and at different offsets, but their functionality is the same as for Gen3. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20230511192220.7523-4-wsa+renesas@sang-engineering.com
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@ -35,6 +35,12 @@
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#define REG_GEN3_PTAT2 0x60
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#define REG_GEN3_PTAT2 0x60
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#define REG_GEN3_PTAT3 0x64
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#define REG_GEN3_PTAT3 0x64
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#define REG_GEN3_THSCP 0x68
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#define REG_GEN3_THSCP 0x68
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#define REG_GEN4_THSFMON00 0x180
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#define REG_GEN4_THSFMON01 0x184
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#define REG_GEN4_THSFMON02 0x188
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#define REG_GEN4_THSFMON15 0x1BC
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#define REG_GEN4_THSFMON16 0x1C0
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#define REG_GEN4_THSFMON17 0x1C4
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/* IRQ{STR,MSK,EN} bits */
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/* IRQ{STR,MSK,EN} bits */
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#define IRQ_TEMP1 BIT(0)
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#define IRQ_TEMP1 BIT(0)
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@ -55,6 +61,7 @@
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#define MCELSIUS(temp) ((temp) * 1000)
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#define MCELSIUS(temp) ((temp) * 1000)
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#define GEN3_FUSE_MASK 0xFFF
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#define GEN3_FUSE_MASK 0xFFF
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#define GEN4_FUSE_MASK 0xFFF
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#define TSC_MAX_NUM 5
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#define TSC_MAX_NUM 5
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@ -272,6 +279,34 @@ static void rcar_gen3_thermal_read_fuses_gen3(struct rcar_gen3_thermal_priv *pri
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}
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}
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}
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}
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static void rcar_gen3_thermal_read_fuses_gen4(struct rcar_gen3_thermal_priv *priv)
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{
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unsigned int i;
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/*
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* Set the pseudo calibration points with fused values.
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* PTAT is shared between all TSCs but only fused for the first
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* TSC while THCODEs are fused for each TSC.
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*/
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priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON16) &
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GEN4_FUSE_MASK;
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priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON17) &
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GEN4_FUSE_MASK;
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priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN4_THSFMON15) &
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GEN4_FUSE_MASK;
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for (i = 0; i < priv->num_tscs; i++) {
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struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
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tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON01) &
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GEN4_FUSE_MASK;
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tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON02) &
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GEN4_FUSE_MASK;
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tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN4_THSFMON00) &
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GEN4_FUSE_MASK;
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}
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}
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static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
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static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
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{
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{
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unsigned int i;
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unsigned int i;
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@ -343,6 +378,11 @@ static const struct rcar_thermal_info rcar_gen3_thermal_info = {
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.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
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.read_fuses = rcar_gen3_thermal_read_fuses_gen3,
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};
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};
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static const struct rcar_thermal_info rcar_gen4_thermal_info = {
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.ths_tj_1 = 126,
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.read_fuses = rcar_gen3_thermal_read_fuses_gen4,
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};
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static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
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static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
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{
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{
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.compatible = "renesas,r8a774a1-thermal",
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.compatible = "renesas,r8a774a1-thermal",
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@ -382,11 +422,11 @@ static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
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},
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},
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{
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{
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.compatible = "renesas,r8a779f0-thermal",
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.compatible = "renesas,r8a779f0-thermal",
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.data = &rcar_gen3_thermal_info,
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.data = &rcar_gen4_thermal_info,
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},
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},
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{
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{
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.compatible = "renesas,r8a779g0-thermal",
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.compatible = "renesas,r8a779g0-thermal",
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.data = &rcar_gen3_thermal_info,
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.data = &rcar_gen4_thermal_info,
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},
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},
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{},
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{},
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};
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};
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