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ARM: zynq: DT: Move size/address properties to dtsi 

Move the GEM's size and address cells properties to the common
dtsi file.

Cc: Andreas Färber <afaerber@suse.de>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Soren Brinkmann 2014-08-20 08:56:58 -07:00 committed by Michal Simek
parent da45581ea8
commit edbd35e70d
2 changed files with 4 additions and 2 deletions
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4
arch/arm/boot/dts/zynq-7000.dtsi
View File

@ -195,6 +195,8 @@
interrupts = <0 22 4>; interrupts = <0 22 4>;
clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
}; };
gem1: ethernet@e000c000 { gem1: ethernet@e000c000 {
@ -204,6 +206,8 @@
interrupts = <0 45 4>; interrupts = <0 45 4>;
clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;
clock-names = "pclk", "hclk", "tx_clk"; clock-names = "pclk", "hclk", "tx_clk";
#address-cells = <1>;
#size-cells = <0>;
}; };
sdhci0: sdhci@e0100000 { sdhci0: sdhci@e0100000 {

2
arch/arm/boot/dts/zynq-parallella.dts
View File

@ -38,8 +38,6 @@
status = "okay"; status = "okay";
phy-mode = "rgmii-id"; phy-mode = "rgmii-id";
phy-handle = <&ethernet_phy>; phy-handle = <&ethernet_phy>;
#address-cells = <1>;
#size-cells = <0>;
ethernet_phy: ethernet-phy@0 { ethernet_phy: ethernet-phy@0 {
/* Marvell 88E1318 */ /* Marvell 88E1318 */