iommu/amd: Implement device aquisition code for IOMMUv2
This patch adds the amd_iommu_init_device() and amd_iommu_free_device() functions which make a device and the IOMMU ready for IOMMUv2 usage. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
This commit is contained in:
Joerg Roedel
parent
e3c495c74b
commit
ed96f228ba
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@ -16,20 +16,230 @@
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/amd-iommu.h>
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#include <linux/mm_types.h>
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#include <linux/module.h>
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#include <linux/iommu.h>
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#include <linux/pci.h>
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#include <linux/gfp.h>
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#include "amd_iommu_proto.h"
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Joerg Roedel <joerg.roedel@amd.com>");
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#define MAX_DEVICES 0x10000
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#define PRI_QUEUE_SIZE 512
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struct pri_queue {
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atomic_t inflight;
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bool finish;
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};
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struct pasid_state {
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struct list_head list; /* For global state-list */
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atomic_t count; /* Reference count */
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struct task_struct *task; /* Task bound to this PASID */
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struct mm_struct *mm; /* mm_struct for the faults */
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struct pri_queue pri[PRI_QUEUE_SIZE]; /* PRI tag states */
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struct device_state *device_state; /* Link to our device_state */
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int pasid; /* PASID index */
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};
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struct device_state {
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atomic_t count;
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struct pci_dev *pdev;
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struct pasid_state **states;
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struct iommu_domain *domain;
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int pasid_levels;
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int max_pasids;
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spinlock_t lock;
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};
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struct device_state **state_table;
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static spinlock_t state_lock;
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/* List and lock for all pasid_states */
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static LIST_HEAD(pasid_state_list);
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static u16 device_id(struct pci_dev *pdev)
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{
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u16 devid;
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devid = pdev->bus->number;
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devid = (devid << 8) | pdev->devfn;
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return devid;
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}
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static struct device_state *get_device_state(u16 devid)
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{
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struct device_state *dev_state;
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unsigned long flags;
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spin_lock_irqsave(&state_lock, flags);
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dev_state = state_table[devid];
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if (dev_state != NULL)
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atomic_inc(&dev_state->count);
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spin_unlock_irqrestore(&state_lock, flags);
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return dev_state;
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}
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static void free_device_state(struct device_state *dev_state)
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{
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iommu_detach_device(dev_state->domain, &dev_state->pdev->dev);
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iommu_domain_free(dev_state->domain);
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kfree(dev_state);
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}
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static void put_device_state(struct device_state *dev_state)
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{
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if (atomic_dec_and_test(&dev_state->count))
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free_device_state(dev_state);
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}
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int amd_iommu_init_device(struct pci_dev *pdev, int pasids)
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{
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struct device_state *dev_state;
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unsigned long flags;
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int ret, tmp;
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u16 devid;
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might_sleep();
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if (!amd_iommu_v2_supported())
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return -ENODEV;
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if (pasids <= 0 || pasids > (PASID_MASK + 1))
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return -EINVAL;
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devid = device_id(pdev);
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dev_state = kzalloc(sizeof(*dev_state), GFP_KERNEL);
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if (dev_state == NULL)
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return -ENOMEM;
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spin_lock_init(&dev_state->lock);
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dev_state->pdev = pdev;
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tmp = pasids;
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for (dev_state->pasid_levels = 0; (tmp - 1) & ~0x1ff; tmp >>= 9)
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dev_state->pasid_levels += 1;
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atomic_set(&dev_state->count, 1);
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dev_state->max_pasids = pasids;
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ret = -ENOMEM;
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dev_state->states = (void *)get_zeroed_page(GFP_KERNEL);
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if (dev_state->states == NULL)
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goto out_free_dev_state;
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dev_state->domain = iommu_domain_alloc(&pci_bus_type);
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if (dev_state->domain == NULL)
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goto out_free_states;
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amd_iommu_domain_direct_map(dev_state->domain);
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ret = amd_iommu_domain_enable_v2(dev_state->domain, pasids);
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if (ret)
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goto out_free_domain;
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ret = iommu_attach_device(dev_state->domain, &pdev->dev);
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if (ret != 0)
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goto out_free_domain;
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spin_lock_irqsave(&state_lock, flags);
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if (state_table[devid] != NULL) {
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spin_unlock_irqrestore(&state_lock, flags);
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ret = -EBUSY;
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goto out_free_domain;
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}
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state_table[devid] = dev_state;
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spin_unlock_irqrestore(&state_lock, flags);
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return 0;
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out_free_domain:
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iommu_domain_free(dev_state->domain);
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out_free_states:
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free_page((unsigned long)dev_state->states);
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out_free_dev_state:
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kfree(dev_state);
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return ret;
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}
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EXPORT_SYMBOL(amd_iommu_init_device);
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void amd_iommu_free_device(struct pci_dev *pdev)
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{
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struct device_state *dev_state;
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unsigned long flags;
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u16 devid;
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if (!amd_iommu_v2_supported())
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return;
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devid = device_id(pdev);
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spin_lock_irqsave(&state_lock, flags);
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dev_state = state_table[devid];
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if (dev_state == NULL) {
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spin_unlock_irqrestore(&state_lock, flags);
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return;
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}
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state_table[devid] = NULL;
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spin_unlock_irqrestore(&state_lock, flags);
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put_device_state(dev_state);
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}
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EXPORT_SYMBOL(amd_iommu_free_device);
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static int __init amd_iommu_v2_init(void)
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{
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size_t state_table_size;
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pr_info("AMD IOMMUv2 driver by Joerg Roedel <joerg.roedel@amd.com>");
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spin_lock_init(&state_lock);
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state_table_size = MAX_DEVICES * sizeof(struct device_state *);
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state_table = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
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get_order(state_table_size));
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if (state_table == NULL)
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return -ENOMEM;
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return 0;
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}
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static void __exit amd_iommu_v2_exit(void)
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{
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struct device_state *dev_state;
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size_t state_table_size;
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int i;
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for (i = 0; i < MAX_DEVICES; ++i) {
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dev_state = get_device_state(i);
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if (dev_state == NULL)
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continue;
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WARN_ON_ONCE(1);
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amd_iommu_free_device(dev_state->pdev);
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put_device_state(dev_state);
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}
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state_table_size = MAX_DEVICES * sizeof(struct device_state *);
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free_pages((unsigned long)state_table, get_order(state_table_size));
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}
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module_init(amd_iommu_v2_init);
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@ -20,10 +20,12 @@
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#ifndef _ASM_X86_AMD_IOMMU_H
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#define _ASM_X86_AMD_IOMMU_H
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#include <linux/irqreturn.h>
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#include <linux/types.h>
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#ifdef CONFIG_AMD_IOMMU
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struct pci_dev;
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extern int amd_iommu_detect(void);
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@ -33,6 +35,7 @@ extern int amd_iommu_detect(void);
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* @pdev: The PCI device the workaround is necessary for
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* @erratum: The erratum workaround to enable
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*
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* The function needs to be called before amd_iommu_init_device().
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* Possible values for the erratum number are for now:
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* - AMD_PRI_DEV_ERRATUM_ENABLE_RESET - Reset PRI capability when PRI
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* is enabled
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@ -44,6 +47,24 @@ extern int amd_iommu_detect(void);
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extern void amd_iommu_enable_device_erratum(struct pci_dev *pdev, u32 erratum);
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/**
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* amd_iommu_init_device() - Init device for use with IOMMUv2 driver
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* @pdev: The PCI device to initialize
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* @pasids: Number of PASIDs to support for this device
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*
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* This function does all setup for the device pdev so that it can be
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* used with IOMMUv2.
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* Returns 0 on success or negative value on error.
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*/
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extern int amd_iommu_init_device(struct pci_dev *pdev, int pasids);
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/**
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* amd_iommu_free_device() - Free all IOMMUv2 related device resources
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* and disable IOMMUv2 usage for this device
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* @pdev: The PCI device to disable IOMMUv2 usage for'
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*/
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extern void amd_iommu_free_device(struct pci_dev *pdev);
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#else
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static inline int amd_iommu_detect(void) { return -ENODEV; }
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