[media] Elonics E4000 silicon tuner driver
Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Antti Palosaari
Mauro Carvalho Chehab
parent
ed7dd24007
commit
ed85adaad6
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@ -222,6 +222,13 @@ config MEDIA_TUNER_TDA18212
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help
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NXP TDA18212 silicon tuner driver.
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config MEDIA_TUNER_E4000
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tristate "Elonics E4000 silicon tuner"
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depends on MEDIA_SUPPORT && I2C
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default m if !MEDIA_SUBDRV_AUTOSELECT
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help
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Elonics E4000 silicon tuner driver.
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config MEDIA_TUNER_TUA9001
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tristate "Infineon TUA 9001 silicon tuner"
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depends on MEDIA_SUPPORT && I2C
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@ -28,6 +28,7 @@ obj-$(CONFIG_MEDIA_TUNER_MC44S803) += mc44s803.o
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obj-$(CONFIG_MEDIA_TUNER_MAX2165) += max2165.o
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obj-$(CONFIG_MEDIA_TUNER_TDA18218) += tda18218.o
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obj-$(CONFIG_MEDIA_TUNER_TDA18212) += tda18212.o
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obj-$(CONFIG_MEDIA_TUNER_E4000) += e4000.o
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obj-$(CONFIG_MEDIA_TUNER_TUA9001) += tua9001.o
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obj-$(CONFIG_MEDIA_TUNER_FC0011) += fc0011.o
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obj-$(CONFIG_MEDIA_TUNER_FC0012) += fc0012.o
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@ -0,0 +1,408 @@
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/*
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* Elonics E4000 silicon tuner driver
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*
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* Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "e4000_priv.h"
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/* write multiple registers */
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static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
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{
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int ret;
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u8 buf[1 + len];
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struct i2c_msg msg[1] = {
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{
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.addr = priv->cfg->i2c_addr,
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.flags = 0,
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.len = sizeof(buf),
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.buf = buf,
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}
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};
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buf[0] = reg;
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memcpy(&buf[1], val, len);
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret == 1) {
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* read multiple registers */
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static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
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{
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int ret;
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u8 buf[len];
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struct i2c_msg msg[2] = {
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{
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.addr = priv->cfg->i2c_addr,
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.flags = 0,
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.len = 1,
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.buf = ®,
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}, {
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.addr = priv->cfg->i2c_addr,
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.flags = I2C_M_RD,
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.len = sizeof(buf),
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.buf = buf,
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}
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};
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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memcpy(val, buf, len);
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ret = 0;
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} else {
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%02x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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ret = -EREMOTEIO;
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}
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return ret;
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}
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/* write single register */
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static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
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{
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return e4000_wr_regs(priv, reg, &val, 1);
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}
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/* read single register */
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static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
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{
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return e4000_rd_regs(priv, reg, val, 1);
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}
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static int e4000_init(struct dvb_frontend *fe)
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{
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struct e4000_priv *priv = fe->tuner_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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/* dummy I2C to ensure I2C wakes up */
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ret = e4000_wr_reg(priv, 0x02, 0x40);
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/* reset */
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ret = e4000_wr_reg(priv, 0x00, 0x01);
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if (ret < 0)
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goto err;
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/* disable output clock */
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ret = e4000_wr_reg(priv, 0x06, 0x00);
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if (ret < 0)
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goto err;
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ret = e4000_wr_reg(priv, 0x7a, 0x96);
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if (ret < 0)
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goto err;
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/* configure gains */
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ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2);
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if (ret < 0)
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goto err;
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ret = e4000_wr_reg(priv, 0x82, 0x00);
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if (ret < 0)
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goto err;
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ret = e4000_wr_reg(priv, 0x24, 0x05);
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if (ret < 0)
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goto err;
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ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2);
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if (ret < 0)
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goto err;
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ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2);
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if (ret < 0)
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goto err;
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/*
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* TODO: Implement DC offset control correctly.
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* DC offsets has quite much effect for received signal quality in case
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* of direct conversion tuners (Zero-IF). Surely we will now lose few
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* decimals or even decibels from SNR...
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*/
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/* DC offset control */
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ret = e4000_wr_reg(priv, 0x2d, 0x0c);
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if (ret < 0)
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goto err;
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/* gain control */
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ret = e4000_wr_reg(priv, 0x1a, 0x17);
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if (ret < 0)
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goto err;
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ret = e4000_wr_reg(priv, 0x1f, 0x1a);
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if (ret < 0)
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goto err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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err:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int e4000_sleep(struct dvb_frontend *fe)
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{
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struct e4000_priv *priv = fe->tuner_priv;
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int ret;
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dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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ret = e4000_wr_reg(priv, 0x00, 0x00);
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if (ret < 0)
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goto err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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err:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int e4000_set_params(struct dvb_frontend *fe)
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{
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struct e4000_priv *priv = fe->tuner_priv;
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struct dtv_frontend_properties *c = &fe->dtv_property_cache;
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int ret, i, sigma_delta;
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unsigned int f_VCO;
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u8 buf[5];
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dev_dbg(&priv->i2c->dev, "%s: delivery_system=%d frequency=%d " \
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"bandwidth_hz=%d\n", __func__,
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c->delivery_system, c->frequency, c->bandwidth_hz);
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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/* gain control manual */
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ret = e4000_wr_reg(priv, 0x1a, 0x00);
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if (ret < 0)
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goto err;
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/* PLL */
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for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
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if (c->frequency <= e4000_pll_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_pll_lut))
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goto err;
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/*
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* Note: Currently f_VCO overflows when c->frequency is 1 073 741 824 Hz
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* or more.
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*/
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f_VCO = c->frequency * e4000_pll_lut[i].mul;
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sigma_delta = 0x10000UL * (f_VCO % priv->cfg->clock) / priv->cfg->clock;
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buf[0] = f_VCO / priv->cfg->clock;
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buf[1] = (sigma_delta >> 0) & 0xff;
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buf[2] = (sigma_delta >> 8) & 0xff;
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buf[3] = 0x00;
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buf[4] = e4000_pll_lut[i].div;
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dev_dbg(&priv->i2c->dev, "%s: f_VCO=%u pll div=%d sigma_delta=%04x\n",
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__func__, f_VCO, buf[0], sigma_delta);
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ret = e4000_wr_regs(priv, 0x09, buf, 5);
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if (ret < 0)
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goto err;
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/* LNA filter (RF filter) */
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for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
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if (c->frequency <= e400_lna_filter_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e400_lna_filter_lut))
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goto err;
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ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val);
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if (ret < 0)
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goto err;
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/* IF filters */
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for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
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if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_if_filter_lut))
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goto err;
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buf[0] = e4000_if_filter_lut[i].reg11_val;
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buf[1] = e4000_if_filter_lut[i].reg12_val;
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ret = e4000_wr_regs(priv, 0x11, buf, 2);
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if (ret < 0)
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goto err;
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/* frequency band */
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for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
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if (c->frequency <= e4000_band_lut[i].freq)
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break;
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}
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if (i == ARRAY_SIZE(e4000_band_lut))
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goto err;
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ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val);
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if (ret < 0)
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goto err;
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ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val);
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if (ret < 0)
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goto err;
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/* gain control auto */
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ret = e4000_wr_reg(priv, 0x1a, 0x17);
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if (ret < 0)
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goto err;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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return 0;
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err:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
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dev_dbg(&priv->i2c->dev, "%s: failed=%d\n", __func__, ret);
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return ret;
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}
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static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
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{
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struct e4000_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
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*frequency = 0; /* Zero-IF */
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return 0;
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}
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static int e4000_release(struct dvb_frontend *fe)
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{
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struct e4000_priv *priv = fe->tuner_priv;
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dev_dbg(&priv->i2c->dev, "%s:\n", __func__);
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kfree(fe->tuner_priv);
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return 0;
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}
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static const struct dvb_tuner_ops e4000_tuner_ops = {
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.info = {
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.name = "Elonics E4000",
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.frequency_min = 174000000,
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.frequency_max = 862000000,
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},
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.release = e4000_release,
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.init = e4000_init,
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.sleep = e4000_sleep,
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.set_params = e4000_set_params,
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.get_if_frequency = e4000_get_if_frequency,
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};
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struct dvb_frontend *e4000_attach(struct dvb_frontend *fe,
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struct i2c_adapter *i2c, const struct e4000_config *cfg)
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{
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struct e4000_priv *priv;
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int ret;
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u8 chip_id;
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 1);
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priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
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if (!priv) {
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ret = -ENOMEM;
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dev_err(&i2c->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
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goto err;
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}
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priv->cfg = cfg;
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priv->i2c = i2c;
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fe->tuner_priv = priv;
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memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
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sizeof(struct dvb_tuner_ops));
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/* check if the tuner is there */
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ret = e4000_rd_reg(priv, 0x02, &chip_id);
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if (ret < 0)
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goto err;
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dev_dbg(&priv->i2c->dev, "%s: chip_id=%02x\n", __func__, chip_id);
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if (chip_id != 0x40)
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goto err;
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|
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/* put sleep as chip seems to be in normal mode by default */
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ret = e4000_wr_reg(priv, 0x00, 0x00);
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if (ret < 0)
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goto err;
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dev_info(&priv->i2c->dev,
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"%s: Elonics E4000 successfully identified\n",
|
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KBUILD_MODNAME);
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|
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if (fe->ops.i2c_gate_ctrl)
|
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fe->ops.i2c_gate_ctrl(fe, 0);
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|
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return fe;
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err:
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if (fe->ops.i2c_gate_ctrl)
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fe->ops.i2c_gate_ctrl(fe, 0);
|
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|
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dev_dbg(&i2c->dev, "%s: failed=%d\n", __func__, ret);
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kfree(priv);
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return NULL;
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}
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EXPORT_SYMBOL(e4000_attach);
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|
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MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
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MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
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MODULE_LICENSE("GPL");
|
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|
|
@ -0,0 +1,52 @@
|
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/*
|
||||
* Elonics E4000 silicon tuner driver
|
||||
*
|
||||
* Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
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#ifndef E4000_H
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#define E4000_H
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#include "dvb_frontend.h"
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||||
|
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struct e4000_config {
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/*
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||||
* I2C address
|
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* 0x64, 0x65, 0x66, 0x67
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||||
*/
|
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u8 i2c_addr;
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||||
|
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/*
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* clock
|
||||
*/
|
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u32 clock;
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||||
};
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|
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#if defined(CONFIG_MEDIA_TUNER_E4000) || \
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(defined(CONFIG_MEDIA_TUNER_E4000_MODULE) && defined(MODULE))
|
||||
extern struct dvb_frontend *e4000_attach(struct dvb_frontend *fe,
|
||||
struct i2c_adapter *i2c, const struct e4000_config *cfg);
|
||||
#else
|
||||
static inline struct dvb_frontend *e4000_attach(struct dvb_frontend *fe,
|
||||
struct i2c_adapter *i2c, const struct e4000_config *cfg)
|
||||
{
|
||||
pr_warn("%s: driver disabled by Kconfig\n", __func__);
|
||||
return NULL;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
@ -0,0 +1,147 @@
|
|||
/*
|
||||
* Elonics E4000 silicon tuner driver
|
||||
*
|
||||
* Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#ifndef E4000_PRIV_H
|
||||
#define E4000_PRIV_H
|
||||
|
||||
#include "e4000.h"
|
||||
|
||||
struct e4000_priv {
|
||||
const struct e4000_config *cfg;
|
||||
struct i2c_adapter *i2c;
|
||||
};
|
||||
|
||||
struct e4000_pll {
|
||||
u32 freq;
|
||||
u8 div;
|
||||
u8 mul;
|
||||
};
|
||||
|
||||
static const struct e4000_pll e4000_pll_lut[] = {
|
||||
/* VCO min VCO max */
|
||||
{ 72400000, 0x0f, 48 }, /* .......... 3475200000 */
|
||||
{ 81200000, 0x0e, 40 }, /* 2896000000 3248000000 */
|
||||
{ 108300000, 0x0d, 32 }, /* 2598400000 3465600000 */
|
||||
{ 162500000, 0x0c, 24 }, /* 2599200000 3900000000 */
|
||||
{ 216600000, 0x0b, 16 }, /* 2600000000 3465600000 */
|
||||
{ 325000000, 0x0a, 12 }, /* 2599200000 3900000000 */
|
||||
{ 350000000, 0x09, 8 }, /* 2600000000 2800000000 */
|
||||
{ 432000000, 0x03, 8 }, /* 2800000000 3456000000 */
|
||||
{ 667000000, 0x02, 6 }, /* 2592000000 4002000000 */
|
||||
{ 1200000000, 0x01, 4 }, /* 2668000000 4800000000 */
|
||||
{ 0xffffffff, 0x00, 2 }, /* 2400000000 .......... */
|
||||
};
|
||||
|
||||
struct e4000_lna_filter {
|
||||
u32 freq;
|
||||
u8 val;
|
||||
};
|
||||
|
||||
static const struct e4000_lna_filter e400_lna_filter_lut[] = {
|
||||
{ 370000000, 0 },
|
||||
{ 392500000, 1 },
|
||||
{ 415000000, 2 },
|
||||
{ 437500000, 3 },
|
||||
{ 462500000, 4 },
|
||||
{ 490000000, 5 },
|
||||
{ 522500000, 6 },
|
||||
{ 557500000, 7 },
|
||||
{ 595000000, 8 },
|
||||
{ 642500000, 9 },
|
||||
{ 695000000, 10 },
|
||||
{ 740000000, 11 },
|
||||
{ 800000000, 12 },
|
||||
{ 865000000, 13 },
|
||||
{ 930000000, 14 },
|
||||
{ 1000000000, 15 },
|
||||
{ 1310000000, 0 },
|
||||
{ 1340000000, 1 },
|
||||
{ 1385000000, 2 },
|
||||
{ 1427500000, 3 },
|
||||
{ 1452500000, 4 },
|
||||
{ 1475000000, 5 },
|
||||
{ 1510000000, 6 },
|
||||
{ 1545000000, 7 },
|
||||
{ 1575000000, 8 },
|
||||
{ 1615000000, 9 },
|
||||
{ 1650000000, 10 },
|
||||
{ 1670000000, 11 },
|
||||
{ 1690000000, 12 },
|
||||
{ 1710000000, 13 },
|
||||
{ 1735000000, 14 },
|
||||
{ 0xffffffff, 15 },
|
||||
};
|
||||
|
||||
struct e4000_band {
|
||||
u32 freq;
|
||||
u8 reg07_val;
|
||||
u8 reg78_val;
|
||||
};
|
||||
|
||||
static const struct e4000_band e4000_band_lut[] = {
|
||||
{ 140000000, 0x01, 0x03 },
|
||||
{ 350000000, 0x03, 0x03 },
|
||||
{ 1000000000, 0x05, 0x03 },
|
||||
{ 0xffffffff, 0x07, 0x00 },
|
||||
};
|
||||
|
||||
struct e4000_if_filter {
|
||||
u32 freq;
|
||||
u8 reg11_val;
|
||||
u8 reg12_val;
|
||||
};
|
||||
|
||||
static const struct e4000_if_filter e4000_if_filter_lut[] = {
|
||||
{ 4300000, 0xfd, 0x1f },
|
||||
{ 4400000, 0xfd, 0x1e },
|
||||
{ 4480000, 0xfc, 0x1d },
|
||||
{ 4560000, 0xfc, 0x1c },
|
||||
{ 4600000, 0xfc, 0x1b },
|
||||
{ 4800000, 0xfc, 0x1a },
|
||||
{ 4900000, 0xfc, 0x19 },
|
||||
{ 5000000, 0xfc, 0x18 },
|
||||
{ 5100000, 0xfc, 0x17 },
|
||||
{ 5200000, 0xfc, 0x16 },
|
||||
{ 5400000, 0xfc, 0x15 },
|
||||
{ 5500000, 0xfc, 0x14 },
|
||||
{ 5600000, 0xfc, 0x13 },
|
||||
{ 5800000, 0xfb, 0x12 },
|
||||
{ 5900000, 0xfb, 0x11 },
|
||||
{ 6000000, 0xfb, 0x10 },
|
||||
{ 6200000, 0xfb, 0x0f },
|
||||
{ 6400000, 0xfa, 0x0e },
|
||||
{ 6600000, 0xfa, 0x0d },
|
||||
{ 6800000, 0xf9, 0x0c },
|
||||
{ 7200000, 0xf9, 0x0b },
|
||||
{ 7400000, 0xf9, 0x0a },
|
||||
{ 7600000, 0xf8, 0x09 },
|
||||
{ 7800000, 0xf8, 0x08 },
|
||||
{ 8200000, 0xf8, 0x07 },
|
||||
{ 8600000, 0xf7, 0x06 },
|
||||
{ 8800000, 0xf7, 0x05 },
|
||||
{ 9200000, 0xf7, 0x04 },
|
||||
{ 9600000, 0xf6, 0x03 },
|
||||
{ 10000000, 0xf6, 0x02 },
|
||||
{ 10600000, 0xf5, 0x01 },
|
||||
{ 11000000, 0xf5, 0x00 },
|
||||
{ 0xffffffff, 0x00, 0x20 },
|
||||
};
|
||||
|
||||
#endif
|
||||
Loading…
Reference in New Issue