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ARM: dts: omap5-uevm: Add USB Host support 

Provide the RESET regulators for the USB PHYs, the USB Host
port modes and the PHY devices.

Also provide pin multiplexer information for the USB host
pins.

Signed-off-by: Roger Quadros <rogerq@ti.com>
[r.sricharan@ti.com: Replaced constants with preprocessor macros]
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Signed-off-by: Benoit Cousson <benoit.cousson@linaro.org>
This commit is contained in:
Roger Quadros 2013-06-07 18:52:48 +05:30 committed by Benoit Cousson
parent fa63d03728
commit ed7f8e8a1c
2 changed files with 100 additions and 0 deletions
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70
arch/arm/boot/dts/omap5-uevm.dts
View File

@ -25,6 +25,40 @@
regulator-max-microvolt = <3000000>;
};
/* HS USB Port 2 RESET */
hsusb2_reset: hsusb2_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb2_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Host PHY on PORT 2 */
hsusb2_phy: hsusb2_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb2_reset>;
};
/* HS USB Port 3 RESET */
hsusb3_reset: hsusb3_reset_reg {
compatible = "regulator-fixed";
regulator-name = "hsusb3_reset";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
startup-delay-us = <70000>;
enable-active-high;
};
/* HS USB Host PHY on PORT 3 */
hsusb3_phy: hsusb3_phy {
compatible = "usb-nop-xceiv";
reset-supply = <&hsusb3_reset>;
};
};
&omap5_pmx_core {
@ -35,6 +69,7 @@
&dmic_pins
&mcbsp1_pins
&mcbsp2_pins
&usbhost_pins
>;
twl6040_pins: pinmux_twl6040_pins {
@ -120,6 +155,32 @@
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
>;
};
usbhost_pins: pinmux_usbhost_pins {
pinctrl-single,pins = <
0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
>;
};
};
&omap5_pmx_wkup {
pinctrl-names = "default";
pinctrl-0 = <
&usbhost_wkup_pins
>;
usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
pinctrl-single,pins = <
0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
>;
};
};
&mmc1 {
@ -164,6 +225,15 @@
status = "disabled";
};
&usbhshost {
port2-mode = "ehci-hsic";
port3-mode = "ehci-hsic";
};
&usbhsehci {
phys = <0 &hsusb2_phy &hsusb3_phy>;
};
&mcspi1 {
};

30
arch/arm/boot/dts/omap5.dtsi
View File

@ -666,5 +666,35 @@
ctrl-module = <&omap_control_usb>;
};
};
usbhstll: usbhstll@4a062000 {
compatible = "ti,usbhs-tll";
reg = <0x4a062000 0x1000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "usb_tll_hs";
};
usbhshost: usbhshost@4a064000 {
compatible = "ti,usbhs-host";
reg = <0x4a064000 0x800>;
ti,hwmods = "usb_host_hs";
#address-cells = <1>;
#size-cells = <1>;
ranges;
usbhsohci: ohci@4a064800 {
compatible = "ti,ohci-omap3", "usb-ohci";
reg = <0x4a064800 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
};
usbhsehci: ehci@4a064c00 {
compatible = "ti,ehci-omap", "usb-ehci";
reg = <0x4a064c00 0x400>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
};
};
};
};