Staging: comedi: Fix coding style issues in ni_tiocmd.c
This patch fixes the following issues in ni_tiocmd.c: WARNING: braces {} are not necessary for any arm of this statement WARNING: braces {} are not necessary for single statement blocks WARNING: printk() should include KERN_ facility level WARNING: line over 80 characters __func__ should be used instead of gcc specific __FUNCTION__ ERROR: that open brace { should be on the previous line WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable Signed-off-by: Xenofon Foukas <foukas.xenofon@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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448d401401
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ed271e049d
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@ -62,11 +62,10 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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unsigned input_select_bits = 0;
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if (enable) {
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if (read_not_write) {
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if (read_not_write)
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input_select_bits |= Gi_Read_Acknowledges_Irq;
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} else {
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else
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input_select_bits |= Gi_Write_Acknowledges_Irq;
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}
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}
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ni_tio_set_bits(counter,
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NITIO_Gi_Input_Select_Reg(counter->counter_index),
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@ -84,9 +83,8 @@ static void ni_tio_configure_dma(struct ni_gpct *counter, short enable,
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gi_dma_config_bits |= Gi_DMA_Enable_Bit;
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gi_dma_config_bits |= Gi_DMA_Int_Bit;
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}
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if (read_not_write == 0) {
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if (read_not_write == 0)
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gi_dma_config_bits |= Gi_DMA_Write_Bit;
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}
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ni_tio_set_bits(counter,
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NITIO_Gi_DMA_Config_Reg(counter->
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counter_index),
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@ -174,7 +172,7 @@ static int ni_tio_input_cmd(struct ni_gpct *counter, struct comedi_async *async)
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static int ni_tio_output_cmd(struct ni_gpct *counter,
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struct comedi_async *async)
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{
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printk("ni_tio: output commands not yet implemented.\n");
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printk(KERN_ERR "ni_tio: output commands not yet implemented.\n");
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return -ENOTSUPP;
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counter->mite_chan->dir = COMEDI_OUTPUT;
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@ -198,9 +196,8 @@ static int ni_tio_cmd_setup(struct ni_gpct *counter, struct comedi_async *async)
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set_gate_source = 1;
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gate_source = cmd->convert_arg;
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}
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if (set_gate_source) {
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if (set_gate_source)
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retval = ni_tio_set_gate_src(counter, 0, gate_source);
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}
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if (cmd->flags & TRIG_WAKE_EOS) {
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ni_tio_set_bits(counter,
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NITIO_Gi_Interrupt_Enable_Reg(counter->
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@ -221,22 +218,21 @@ int ni_tio_cmd(struct ni_gpct *counter, struct comedi_async *async)
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spin_lock_irqsave(&counter->lock, flags);
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if (counter->mite_chan == NULL) {
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printk
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("ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n");
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printk(KERN_ERR "ni_tio: commands only supported with DMA. Interrupt-driven commands not yet implemented.\n");
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retval = -EIO;
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} else {
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retval = ni_tio_cmd_setup(counter, async);
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if (retval == 0) {
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if (cmd->flags & CMDF_WRITE) {
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if (cmd->flags & CMDF_WRITE)
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retval = ni_tio_output_cmd(counter, async);
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} else {
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else
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retval = ni_tio_input_cmd(counter, async);
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}
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}
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}
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spin_unlock_irqrestore(&counter->lock, flags);
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return retval;
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}
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EXPORT_SYMBOL_GPL(ni_tio_cmd);
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int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
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{
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@ -342,6 +338,7 @@ int ni_tio_cmdtest(struct ni_gpct *counter, struct comedi_cmd *cmd)
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return 0;
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}
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EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
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int ni_tio_cancel(struct ni_gpct *counter)
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{
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@ -349,9 +346,8 @@ int ni_tio_cancel(struct ni_gpct *counter)
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ni_tio_arm(counter, 0, 0);
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spin_lock_irqsave(&counter->lock, flags);
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if (counter->mite_chan) {
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if (counter->mite_chan)
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mite_dma_disarm(counter->mite_chan);
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}
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spin_unlock_irqrestore(&counter->lock, flags);
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ni_tio_configure_dma(counter, 0, 0);
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@ -361,10 +357,11 @@ int ni_tio_cancel(struct ni_gpct *counter)
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0x0);
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return 0;
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}
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EXPORT_SYMBOL_GPL(ni_tio_cancel);
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/* During buffered input counter operation for e-series, the gate interrupt is acked
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automatically by the dma controller, due to the Gi_Read/Write_Acknowledges_IRQ bits
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in the input select register. */
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/* During buffered input counter operation for e-series, the gate
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interrupt is acked automatically by the dma controller, due to the
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Gi_Read/Write_Acknowledges_IRQ bits in the input select register. */
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static int should_ack_gate(struct ni_gpct *counter)
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{
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unsigned long flags;
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@ -372,7 +369,10 @@ static int should_ack_gate(struct ni_gpct *counter)
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switch (counter->counter_dev->variant) {
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case ni_gpct_variant_m_series:
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case ni_gpct_variant_660x: /* not sure if 660x really supports gate interrupts (the bits are not listed in register-level manual) */
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/* not sure if 660x really supports gate
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interrupts (the bits are not listed
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in register-level manual) */
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case ni_gpct_variant_660x:
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return 1;
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break;
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case ni_gpct_variant_e_series:
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@ -416,7 +416,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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if (gxx_status & Gi_Gate_Error_Bit(counter->counter_index)) {
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ack |= Gi_Gate_Error_Confirm_Bit(counter->counter_index);
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if (gate_error) {
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/*660x don't support automatic acknowledgement of gate interrupt via dma read/write
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/*660x don't support automatic acknowledgement
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of gate interrupt via dma read/write
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and report bogus gate errors */
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if (counter->counter_dev->variant !=
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ni_gpct_variant_660x) {
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@ -429,9 +430,8 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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if (tc_error)
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*tc_error = 1;
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}
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if (gi_status & Gi_TC_Bit) {
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if (gi_status & Gi_TC_Bit)
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ack |= Gi_TC_Interrupt_Ack_Bit;
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}
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if (gi_status & Gi_Gate_Interrupt_Bit) {
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if (should_ack_gate(counter))
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ack |= Gi_Gate_Interrupt_Ack_Bit;
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@ -452,13 +452,14 @@ void ni_tio_acknowledge_and_confirm(struct ni_gpct *counter, int *gate_error,
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NITIO_Gxx_Joint_Status2_Reg
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(counter->counter_index)) &
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Gi_Permanent_Stale_Bit(counter->counter_index)) {
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printk("%s: Gi_Permanent_Stale_Data detected.\n",
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__FUNCTION__);
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printk(KERN_INFO "%s: Gi_Permanent_Stale_Data detected.\n",
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__func__);
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if (perm_stale_data)
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*perm_stale_data = 1;
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}
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}
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}
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EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
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void ni_tio_handle_interrupt(struct ni_gpct *counter,
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struct comedi_subdevice *s)
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@ -472,20 +473,19 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
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ni_tio_acknowledge_and_confirm(counter, &gate_error, &tc_error,
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&perm_stale_data, NULL);
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if (gate_error) {
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printk("%s: Gi_Gate_Error detected.\n", __FUNCTION__);
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printk(KERN_NOTICE "%s: Gi_Gate_Error detected.\n", __func__);
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s->async->events |= COMEDI_CB_OVERFLOW;
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}
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if (perm_stale_data) {
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if (perm_stale_data)
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s->async->events |= COMEDI_CB_ERROR;
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}
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switch (counter->counter_dev->variant) {
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case ni_gpct_variant_m_series:
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case ni_gpct_variant_660x:
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if (read_register(counter,
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NITIO_Gi_DMA_Status_Reg
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(counter->counter_index)) & Gi_DRQ_Error_Bit)
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{
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printk("%s: Gi_DRQ_Error detected.\n", __FUNCTION__);
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NITIO_Gi_DMA_Status_Reg
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(counter->counter_index)) & Gi_DRQ_Error_Bit) {
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printk(KERN_NOTICE "%s: Gi_DRQ_Error detected.\n",
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__func__);
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s->async->events |= COMEDI_CB_OVERFLOW;
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}
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break;
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@ -506,6 +506,7 @@ void ni_tio_handle_interrupt(struct ni_gpct *counter,
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mite_sync_input_dma(counter->mite_chan, s->async);
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spin_unlock_irqrestore(&counter->lock, flags);
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}
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EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
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void ni_tio_set_mite_channel(struct ni_gpct *counter,
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struct mite_channel *mite_chan)
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@ -516,6 +517,7 @@ void ni_tio_set_mite_channel(struct ni_gpct *counter,
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counter->mite_chan = mite_chan;
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spin_unlock_irqrestore(&counter->lock, flags);
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}
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EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
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static int __init ni_tiocmd_init_module(void)
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{
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@ -529,10 +531,3 @@ static void __exit ni_tiocmd_cleanup_module(void)
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}
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module_exit(ni_tiocmd_cleanup_module);
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EXPORT_SYMBOL_GPL(ni_tio_cmd);
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EXPORT_SYMBOL_GPL(ni_tio_cmdtest);
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EXPORT_SYMBOL_GPL(ni_tio_cancel);
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EXPORT_SYMBOL_GPL(ni_tio_handle_interrupt);
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EXPORT_SYMBOL_GPL(ni_tio_set_mite_channel);
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EXPORT_SYMBOL_GPL(ni_tio_acknowledge_and_confirm);
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