drm/nouveau/gr/gk104-gk20a: call pmu to disable any power-gating before ctor()
On some of these chipsets, reading NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK can trigger a PRI fault and return an error code instead of a TPC mask, unless PGOB has been disabled first. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -124,6 +124,9 @@ void gf100_gr_dtor(struct nvkm_object *);
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int gf100_gr_init(struct nvkm_object *);
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void gf100_gr_zbc_init(struct gf100_gr_priv *);
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int gk104_gr_ctor(struct nvkm_object *, struct nvkm_object *,
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struct nvkm_oclass *, void *data, u32 size,
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struct nvkm_object **);
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int gk104_gr_init(struct nvkm_object *);
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extern struct nvkm_ofuncs gf100_fermi_ofuncs;
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@ -310,6 +310,17 @@ gk104_gr_init(struct nvkm_object *object)
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return gf100_gr_init_ctxctl(priv);
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}
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int
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gk104_gr_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct nvkm_pmu *pmu = nvkm_pmu(parent);
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if (pmu)
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pmu->pgob(pmu, false);
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return gf100_gr_ctor(parent, engine, oclass, data, size, pobject);
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}
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#include "fuc/hubgk104.fuc3.h"
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static struct gf100_gr_ucode
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@ -334,7 +345,7 @@ struct nvkm_oclass *
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gk104_gr_oclass = &(struct gf100_gr_oclass) {
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.base.handle = NV_ENGINE(GR, 0xe4),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gf100_gr_ctor,
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.ctor = gk104_gr_ctor,
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.dtor = gf100_gr_dtor,
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.init = gk104_gr_init,
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.fini = _nvkm_gr_fini,
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@ -197,7 +197,7 @@ struct nvkm_oclass *
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gk110_gr_oclass = &(struct gf100_gr_oclass) {
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.base.handle = NV_ENGINE(GR, 0xf0),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gf100_gr_ctor,
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.ctor = gk104_gr_ctor,
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.dtor = gf100_gr_dtor,
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.init = gk104_gr_init,
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.fini = _nvkm_gr_fini,
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@ -102,7 +102,7 @@ struct nvkm_oclass *
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gk110b_gr_oclass = &(struct gf100_gr_oclass) {
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.base.handle = NV_ENGINE(GR, 0xf1),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gf100_gr_ctor,
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.ctor = gk104_gr_ctor,
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.dtor = gf100_gr_dtor,
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.init = gk104_gr_init,
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.fini = _nvkm_gr_fini,
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@ -176,7 +176,7 @@ struct nvkm_oclass *
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gk208_gr_oclass = &(struct gf100_gr_oclass) {
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.base.handle = NV_ENGINE(GR, 0x08),
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.base.ofuncs = &(struct nvkm_ofuncs) {
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.ctor = gf100_gr_ctor,
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.ctor = gk104_gr_ctor,
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.dtor = gf100_gr_dtor,
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.init = gk104_gr_init,
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.fini = _nvkm_gr_fini,
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