DaVinci: DM365: Correct USB parent clock
The parent clock for the USB source clock is actually PLL1 aux clock, not PLL2 sysclk1. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -369,7 +369,7 @@ static struct clk timer3_clk = {
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static struct clk usb_clk = {
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.name = "usb",
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.parent = &pll2_sysclk1,
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.parent = &pll1_aux_clk,
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.lpsc = DAVINCI_LPSC_USB,
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};
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