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ARM: dts: Add devicetree for Nuvoton WPCM450 BMC chip 

The WPCM450 is an older BMC SoC in the Nuvoton NPCM family, originally
marketed as Winbond WPCM450.

This patch adds a devicetree with basic functionality.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20210406120921.2484986-9-j.neuschaefer@gmx.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
This commit is contained in:
Jonathan Neuschäfer 2021-04-06 14:09:19 +02:00 committed by Joel Stanley
parent 328d1c1a92
commit ed09d269b9
1 changed files with 76 additions and 0 deletions
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76
arch/arm/boot/dts/nuvoton-wpcm450.dtsi Normal file
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// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
// Copyright 2021 Jonathan Neuschäfer
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "nuvoton,wpcm450";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
};
};
clk24m: clock-24mhz {
/* 24 MHz dummy clock */
compatible = "fixed-clock";
clock-frequency = <24000000>;
#clock-cells = <0>;
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&aic>;
ranges;
serial0: serial@b8000000 {
compatible = "nuvoton,wpcm450-uart";
reg = <0xb8000000 0x20>;
reg-shift = <2>;
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24m>;
status = "disabled";
};
serial1: serial@b8000100 {
compatible = "nuvoton,wpcm450-uart";
reg = <0xb8000100 0x20>;
reg-shift = <2>;
interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk24m>;
status = "disabled";
};
timer0: timer@b8001000 {
compatible = "nuvoton,wpcm450-timer";
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xb8001000 0x1c>;
clocks = <&clk24m>;
};
watchdog0: watchdog@b800101c {
compatible = "nuvoton,wpcm450-wdt";
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xb800101c 0x4>;
clocks = <&clk24m>;
status = "disabled";
};
aic: interrupt-controller@b8002000 {
compatible = "nuvoton,wpcm450-aic";
reg = <0xb8002000 0x1000>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};