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drm/amd/pp: Convert 10KHz to KHz as variable name 

The default clock unit in powerplay is 10KHz.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2018-07-05 16:45:21 +08:00 committed by Alex Deucher
parent 73b1917454
commit ed0926647d
2 changed files with 2 additions and 3 deletions
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2
drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c
View File

@ -3801,7 +3801,7 @@ static int vega10_notify_smc_display_config_after_ps_adjustment(
if (i < dpm_table->count) { if (i < dpm_table->count) {
clock_req.clock_type = amd_pp_dcef_clock; clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value; clock_req.clock_freq_in_khz = dpm_table->dpm_levels[i].value * 10;
if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) { if (!vega10_display_clock_voltage_request(hwmgr, &clock_req)) {
smum_send_msg_to_smc_with_parameter( smum_send_msg_to_smc_with_parameter(
hwmgr, PPSMC_MSG_SetMinDeepSleepDcefclk, hwmgr, PPSMC_MSG_SetMinDeepSleepDcefclk,

3
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
View File

@ -1361,7 +1361,6 @@ int vega12_display_clock_voltage_request(struct pp_hwmgr *hwmgr,
if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) { if (data->smu_features[GNLD_DPM_DCEFCLK].enabled) {
switch (clk_type) { switch (clk_type) {
case amd_pp_dcef_clock: case amd_pp_dcef_clock:
clk_freq = clock_req->clock_freq_in_khz / 100;
clk_select = PPCLK_DCEFCLK; clk_select = PPCLK_DCEFCLK;
break; break;
case amd_pp_disp_clock: case amd_pp_disp_clock:
@ -1410,7 +1409,7 @@ static int vega12_notify_smc_display_config_after_ps_adjustment(
if (data->smu_features[GNLD_DPM_DCEFCLK].supported) { if (data->smu_features[GNLD_DPM_DCEFCLK].supported) {
clock_req.clock_type = amd_pp_dcef_clock; clock_req.clock_type = amd_pp_dcef_clock;
clock_req.clock_freq_in_khz = min_clocks.dcefClock; clock_req.clock_freq_in_khz = min_clocks.dcefClock/10;
if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) { if (!vega12_display_clock_voltage_request(hwmgr, &clock_req)) {
if (data->smu_features[GNLD_DS_DCEFCLK].supported) if (data->smu_features[GNLD_DS_DCEFCLK].supported)
PP_ASSERT_WITH_CODE( PP_ASSERT_WITH_CODE(