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drm/amdgpu: Add secure display TA interface 

Add interface to load, unload, invoke command for
secure display TA.

v2: Add debugfs interface for secure display TA
v3: fix warning in copy_from_user (Alex)

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jinzhou Su 2020-12-09 10:57:05 +08:00 committed by Alex Deucher
parent a944c12724
commit ecaafb7b5a
8 changed files with 438 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/amdgpu/Makefile
View File

@ -56,7 +56,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
amdgpu_fw_attestation.o
amdgpu_fw_attestation.o amdgpu_securedisplay.o
amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o

3
drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c
View File

@ -35,6 +35,7 @@
#include "amdgpu_dm_debugfs.h"
#include "amdgpu_ras.h"
#include "amdgpu_rap.h"
#include "amdgpu_securedisplay.h"
#include "amdgpu_fw_attestation.h"
/**
@ -1669,6 +1670,8 @@ int amdgpu_debugfs_init(struct amdgpu_device *adev)
amdgpu_rap_debugfs_init(adev);
amdgpu_securedisplay_debugfs_init(adev);
amdgpu_fw_attestation_debugfs_init(adev);
return amdgpu_debugfs_add_files(adev, amdgpu_debugfs_list,

191
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c
View File

@ -36,6 +36,7 @@
#include "psp_v12_0.h"
#include "amdgpu_ras.h"
#include "amdgpu_securedisplay.h"
static int psp_sysfs_init(struct amdgpu_device *adev);
static void psp_sysfs_fini(struct amdgpu_device *adev);
@ -1652,6 +1653,175 @@ int psp_rap_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
}
// RAP end
/* securedisplay start */
static int psp_securedisplay_init_shared_buf(struct psp_context *psp)
{
int ret;
/*
* Allocate 16k memory aligned to 4k from Frame Buffer (local
* physical) for sa ta <-> Driver
*/
ret = amdgpu_bo_create_kernel(psp->adev, PSP_SECUREDISPLAY_SHARED_MEM_SIZE,
PAGE_SIZE, AMDGPU_GEM_DOMAIN_VRAM,
&psp->securedisplay_context.securedisplay_shared_bo,
&psp->securedisplay_context.securedisplay_shared_mc_addr,
&psp->securedisplay_context.securedisplay_shared_buf);
return ret;
}
static int psp_securedisplay_load(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
memset(psp->fw_pri_buf, 0, PSP_1_MEG);
memcpy(psp->fw_pri_buf, psp->ta_securedisplay_start_addr, psp->ta_securedisplay_ucode_size);
psp_prep_ta_load_cmd_buf(cmd,
psp->fw_pri_mc_addr,
psp->ta_securedisplay_ucode_size,
psp->securedisplay_context.securedisplay_shared_mc_addr,
PSP_SECUREDISPLAY_SHARED_MEM_SIZE);
ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
if (ret)
goto failed;
psp->securedisplay_context.securedisplay_initialized = true;
psp->securedisplay_context.session_id = cmd->resp.session_id;
mutex_init(&psp->securedisplay_context.mutex);
failed:
kfree(cmd);
return ret;
}
static int psp_securedisplay_unload(struct psp_context *psp)
{
int ret;
struct psp_gfx_cmd_resp *cmd;
cmd = kzalloc(sizeof(struct psp_gfx_cmd_resp), GFP_KERNEL);
if (!cmd)
return -ENOMEM;
psp_prep_ta_unload_cmd_buf(cmd, psp->securedisplay_context.session_id);
ret = psp_cmd_submit_buf(psp, NULL, cmd, psp->fence_buf_mc_addr);
kfree(cmd);
return ret;
}
static int psp_securedisplay_initialize(struct psp_context *psp)
{
int ret;
struct securedisplay_cmd *securedisplay_cmd;
/*
* TODO: bypass the initialize in sriov for now
*/
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->adev->psp.ta_securedisplay_ucode_size ||
!psp->adev->psp.ta_securedisplay_start_addr) {
dev_info(psp->adev->dev, "SECUREDISPLAY: securedisplay ta ucode is not available\n");
return 0;
}
if (!psp->securedisplay_context.securedisplay_initialized) {
ret = psp_securedisplay_init_shared_buf(psp);
if (ret)
return ret;
}
ret = psp_securedisplay_load(psp);
if (ret)
return ret;
psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,
TA_SECUREDISPLAY_COMMAND__QUERY_TA);
ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__QUERY_TA);
if (ret) {
psp_securedisplay_unload(psp);
amdgpu_bo_free_kernel(&psp->securedisplay_context.securedisplay_shared_bo,
&psp->securedisplay_context.securedisplay_shared_mc_addr,
&psp->securedisplay_context.securedisplay_shared_buf);
psp->securedisplay_context.securedisplay_initialized = false;
dev_err(psp->adev->dev, "SECUREDISPLAY TA initialize fail.\n");
return -EINVAL;
}
if (securedisplay_cmd->status != TA_SECUREDISPLAY_STATUS__SUCCESS) {
psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status);
dev_err(psp->adev->dev, "SECUREDISPLAY: query securedisplay TA failed. ret 0x%x\n",
securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret);
}
return 0;
}
static int psp_securedisplay_terminate(struct psp_context *psp)
{
int ret;
/*
* TODO:bypass the terminate in sriov for now
*/
if (amdgpu_sriov_vf(psp->adev))
return 0;
if (!psp->securedisplay_context.securedisplay_initialized)
return 0;
ret = psp_securedisplay_unload(psp);
if (ret)
return ret;
psp->securedisplay_context.securedisplay_initialized = false;
/* free securedisplay shared memory */
amdgpu_bo_free_kernel(&psp->securedisplay_context.securedisplay_shared_bo,
&psp->securedisplay_context.securedisplay_shared_mc_addr,
&psp->securedisplay_context.securedisplay_shared_buf);
return ret;
}
int psp_securedisplay_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
{
int ret;
if (!psp->securedisplay_context.securedisplay_initialized)
return -EINVAL;
if (ta_cmd_id != TA_SECUREDISPLAY_COMMAND__QUERY_TA &&
ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC)
return -EINVAL;
mutex_lock(&psp->securedisplay_context.mutex);
ret = psp_ta_invoke(psp, ta_cmd_id, psp->securedisplay_context.session_id);
mutex_unlock(&psp->securedisplay_context.mutex);
return ret;
}
/* SECUREDISPLAY end */
static int psp_hw_start(struct psp_context *psp)
{
struct amdgpu_device *adev = psp->adev;
@ -2126,6 +2296,11 @@ skip_memalloc:
if (ret)
dev_err(psp->adev->dev,
"RAP: Failed to initialize RAP\n");
ret = psp_securedisplay_initialize(psp);
if (ret)
dev_err(psp->adev->dev,
"SECUREDISPLAY: Failed to initialize SECUREDISPLAY\n");
}
return 0;
@ -2176,6 +2351,7 @@ static int psp_hw_fini(void *handle)
if (psp->adev->psp.ta_fw) {
psp_ras_terminate(psp);
psp_securedisplay_terminate(psp);
psp_rap_terminate(psp);
psp_dtm_terminate(psp);
psp_hdcp_terminate(psp);
@ -2240,6 +2416,11 @@ static int psp_suspend(void *handle)
DRM_ERROR("Failed to terminate rap ta\n");
return ret;
}
ret = psp_securedisplay_terminate(psp);
if (ret) {
DRM_ERROR("Failed to terminate securedisplay ta\n");
return ret;
}
}
ret = psp_asd_unload(psp);
@ -2323,6 +2504,11 @@ static int psp_resume(void *handle)
if (ret)
dev_err(psp->adev->dev,
"RAP: Failed to initialize RAP\n");
ret = psp_securedisplay_initialize(psp);
if (ret)
dev_err(psp->adev->dev,
"SECUREDISPLAY: Failed to initialize SECUREDISPLAY\n");
}
mutex_unlock(&adev->firmware.mutex);
@ -2629,6 +2815,11 @@ static int parse_ta_bin_descriptor(struct psp_context *psp,
psp->ta_rap_ucode_size = le32_to_cpu(desc->size_bytes);
psp->ta_rap_start_addr = ucode_start_addr;
break;
case TA_FW_TYPE_PSP_SECUREDISPLAY:
psp->ta_securedisplay_ucode_version = le32_to_cpu(desc->fw_version);
psp->ta_securedisplay_ucode_size = le32_to_cpu(desc->size_bytes);
psp->ta_securedisplay_start_addr = ucode_start_addr;
break;
default:
dev_warn(psp->adev->dev, "Unsupported TA type: %d\n", desc->fw_type);
break;

17
drivers/gpu/drm/amd/amdgpu/amdgpu_psp.h
View File

@ -30,6 +30,7 @@
#include "ta_xgmi_if.h"
#include "ta_ras_if.h"
#include "ta_rap_if.h"
#include "ta_secureDisplay_if.h"
#define PSP_FENCE_BUFFER_SIZE 0x1000
#define PSP_CMD_BUFFER_SIZE 0x1000
@ -40,6 +41,7 @@
#define PSP_HDCP_SHARED_MEM_SIZE 0x4000
#define PSP_DTM_SHARED_MEM_SIZE 0x4000
#define PSP_RAP_SHARED_MEM_SIZE 0x4000
#define PSP_SECUREDISPLAY_SHARED_MEM_SIZE 0x4000
#define PSP_SHARED_MEM_SIZE 0x4000
#define PSP_FW_NAME_LEN 0x24
@ -171,6 +173,15 @@ struct psp_rap_context {
struct mutex mutex;
};
struct psp_securedisplay_context {
bool securedisplay_initialized;
uint32_t session_id;
struct amdgpu_bo *securedisplay_shared_bo;
uint64_t securedisplay_shared_mc_addr;
void *securedisplay_shared_buf;
struct mutex mutex;
};
#define MEM_TRAIN_SYSTEM_SIGNATURE 0x54534942
#define GDDR6_MEM_TRAINING_DATA_SIZE_IN_BYTES 0x1000
#define GDDR6_MEM_TRAINING_OFFSET 0x8000
@ -298,12 +309,17 @@ struct psp_context
uint32_t ta_rap_ucode_size;
uint8_t *ta_rap_start_addr;
uint32_t ta_securedisplay_ucode_version;
uint32_t ta_securedisplay_ucode_size;
uint8_t *ta_securedisplay_start_addr;
struct psp_asd_context asd_context;
struct psp_xgmi_context xgmi_context;
struct psp_ras_context ras;
struct psp_hdcp_context hdcp_context;
struct psp_dtm_context dtm_context;
struct psp_rap_context rap_context;
struct psp_securedisplay_context securedisplay_context;
struct mutex mutex;
struct psp_memory_training_context mem_train_ctx;
};
@ -380,6 +396,7 @@ int psp_ras_trigger_error(struct psp_context *psp,
int psp_hdcp_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
int psp_dtm_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
int psp_rap_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
int psp_securedisplay_invoke(struct psp_context *psp, uint32_t ta_cmd_id);
int psp_rlc_autoload_start(struct psp_context *psp);

176
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.c Normal file
View File

@ -0,0 +1,176 @@
/*
* Copyright 2021 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#include <linux/debugfs.h>
#include <linux/pm_runtime.h>
#include "amdgpu.h"
#include "amdgpu_securedisplay.h"
/**
* DOC: AMDGPU SECUREDISPLAY debugfs test interface
*
* how to use?
* echo opcode <value> > <debugfs_dir>/dri/xxx/securedisplay_test
* eg. echo 1 > <debugfs_dir>/dri/xxx/securedisplay_test
* eg. echo 2 phy_id > <debugfs_dir>/dri/xxx/securedisplay_test
*
* opcode:
* 1：Query whether TA is responding used only for validation pupose
* 2: Send region of Interest and CRC value to I2C. (uint32)phy_id is
* send to determine which DIO scratch register should be used to get
* ROI and receive i2c_buf as the output.
*
* You can refer more detail from header file ta_securedisplay_if.h
*
*/
void psp_securedisplay_parse_resp_status(struct psp_context *psp,
enum ta_securedisplay_status status)
{
switch (status) {
case TA_SECUREDISPLAY_STATUS__SUCCESS:
break;
case TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE:
dev_err(psp->adev->dev, "Secure display: Generic Failure.");
break;
case TA_SECUREDISPLAY_STATUS__INVALID_PARAMETER:
dev_err(psp->adev->dev, "Secure display: Invalid Parameter.");
break;
case TA_SECUREDISPLAY_STATUS__NULL_POINTER:
dev_err(psp->adev->dev, "Secure display: Null Pointer.");
break;
case TA_SECUREDISPLAY_STATUS__I2C_WRITE_ERROR:
dev_err(psp->adev->dev, "Secure display: Failed to write to I2C.");
break;
case TA_SECUREDISPLAY_STATUS__READ_DIO_SCRATCH_ERROR:
dev_err(psp->adev->dev, "Secure display: Failed to Read DIO Scratch Register.");
break;
case TA_SECUREDISPLAY_STATUS__READ_CRC_ERROR:
dev_err(psp->adev->dev, "Secure display: Failed to Read CRC");
break;
default:
dev_err(psp->adev->dev, "Secure display: Failed to parse status: %d\n", status);
}
}
void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd,
enum ta_securedisplay_command command_id)
{
*cmd = (struct securedisplay_cmd *)psp->securedisplay_context.securedisplay_shared_buf;
memset(*cmd, 0, sizeof(struct securedisplay_cmd));
(*cmd)->status = TA_SECUREDISPLAY_STATUS__GENERIC_FAILURE;
(*cmd)->cmd_id = command_id;
}
static ssize_t amdgpu_securedisplay_debugfs_write(struct file *f, const char __user *buf,
size_t size, loff_t *pos)
{
struct amdgpu_device *adev = (struct amdgpu_device *)file_inode(f)->i_private;
struct psp_context *psp = &adev->psp;
struct securedisplay_cmd *securedisplay_cmd;
struct drm_device *dev = adev_to_drm(adev);
uint32_t phy_id;
uint32_t op;
int i;
char str[64];
char i2c_output[256];
int ret;
if (*pos || size > sizeof(str) - 1)
return -EINVAL;
memset(str, 0, sizeof(str));
ret = copy_from_user(str, buf, size);
if (ret)
return -EFAULT;
ret = pm_runtime_get_sync(dev->dev);
if (ret < 0) {
pm_runtime_put_autosuspend(dev->dev);
return ret;
}
if (size < 3)
sscanf(str, "%u ", &op);
else
sscanf(str, "%u %u", &op, &phy_id);
switch (op) {
case 1:
psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,
TA_SECUREDISPLAY_COMMAND__QUERY_TA);
ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__QUERY_TA);
if (!ret) {
if (securedisplay_cmd->status == TA_SECUREDISPLAY_STATUS__SUCCESS)
dev_info(adev->dev, "SECUREDISPLAY: query securedisplay TA ret is 0x%X\n",
securedisplay_cmd->securedisplay_out_message.query_ta.query_cmd_ret);
else
psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status);
}
break;
case 2:
psp_prep_securedisplay_cmd_buf(psp, &securedisplay_cmd,
TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);
securedisplay_cmd->securedisplay_in_message.send_roi_crc.phy_id = phy_id;
ret = psp_securedisplay_invoke(psp, TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC);
if (!ret) {
if (securedisplay_cmd->status == TA_SECUREDISPLAY_STATUS__SUCCESS) {
memset(i2c_output, 0, sizeof(i2c_output));
for (i = 0; i < TA_SECUREDISPLAY_I2C_BUFFER_SIZE; i++)
sprintf(i2c_output, "%s 0x%X", i2c_output,
securedisplay_cmd->securedisplay_out_message.send_roi_crc.i2c_buf[i]);
dev_info(adev->dev, "SECUREDISPLAY: I2C buffer out put is :%s\n", i2c_output);
} else {
psp_securedisplay_parse_resp_status(psp, securedisplay_cmd->status);
}
}
break;
default:
dev_err(adev->dev, "Invalid input: %s\n", str);
}
pm_runtime_mark_last_busy(dev->dev);
pm_runtime_put_autosuspend(dev->dev);
return size;
}
static const struct file_operations amdgpu_securedisplay_debugfs_ops = {
.owner = THIS_MODULE,
.read = NULL,
.write = amdgpu_securedisplay_debugfs_write,
.llseek = default_llseek
};
void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev)
{
#if defined(CONFIG_DEBUG_FS)
if (!adev->psp.securedisplay_context.securedisplay_initialized)
return;
debugfs_create_file("securedisplay_test", S_IWUSR, adev_to_drm(adev)->primary->debugfs_root,
adev, &amdgpu_securedisplay_debugfs_ops);
#endif
}

36
drivers/gpu/drm/amd/amdgpu/amdgpu_securedisplay.h Normal file
View File

@ -0,0 +1,36 @@
/*
* Copyright 2021 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*
*
*/
#ifndef _AMDGPU_SECUREDISPLAY_H
#define _AMDGPU_SECUREDISPLAY_H
#include "amdgpu.h"
#include "ta_secureDisplay_if.h"
void amdgpu_securedisplay_debugfs_init(struct amdgpu_device *adev);
void psp_securedisplay_parse_resp_status(struct psp_context *psp,
enum ta_securedisplay_status status);
void psp_prep_securedisplay_cmd_buf(struct psp_context *psp, struct securedisplay_cmd **cmd,
enum ta_securedisplay_command command_id);
#endif

4
drivers/gpu/drm/amd/amdgpu/amdgpu_ucode.h
View File

@ -122,6 +122,9 @@ struct ta_firmware_header_v1_0 {
uint32_t ta_dtm_ucode_version;
uint32_t ta_dtm_offset_bytes;
uint32_t ta_dtm_size_bytes;
uint32_t ta_securedisplay_ucode_version;
uint32_t ta_securedisplay_offset_bytes;
uint32_t ta_securedisplay_size_bytes;
};
enum ta_fw_type {
@ -132,6 +135,7 @@ enum ta_fw_type {
TA_FW_TYPE_PSP_HDCP,
TA_FW_TYPE_PSP_DTM,
TA_FW_TYPE_PSP_RAP,
TA_FW_TYPE_PSP_SECUREDISPLAY,
};
struct ta_fw_bin_desc {

12
drivers/gpu/drm/amd/amdgpu/psp_v10_0.c
View File

@ -92,8 +92,6 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
(uint8_t *)ta_hdr +
le32_to_cpu(ta_hdr->header.ucode_array_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
adev->psp.ta_dtm_ucode_version =
le32_to_cpu(ta_hdr->ta_dtm_ucode_version);
adev->psp.ta_dtm_ucode_size =
@ -101,6 +99,16 @@ static int psp_v10_0_init_microcode(struct psp_context *psp)
adev->psp.ta_dtm_start_addr =
(uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_dtm_offset_bytes);
adev->psp.ta_securedisplay_ucode_version =
le32_to_cpu(ta_hdr->ta_securedisplay_ucode_version);
adev->psp.ta_securedisplay_ucode_size =
le32_to_cpu(ta_hdr->ta_securedisplay_size_bytes);
adev->psp.ta_securedisplay_start_addr =
(uint8_t *)adev->psp.ta_hdcp_start_addr +
le32_to_cpu(ta_hdr->ta_securedisplay_offset_bytes);
adev->psp.ta_fw_version = le32_to_cpu(ta_hdr->header.ucode_version);
}
return 0;