usb: dwc3: core: add support for realtek SoCs custom's global register start address
The Realtek RTD SoCs were designed with the global register address offset at 0x8100. The default address offset is constant at DWC3_GLOBALS_REGS_START (0xc100). Therefore, add a check if the compatible name of the parent is realtek,rtd-dwc3, then global register start address will remap to 0x8100. Signed-off-by: Stanley Chang <stanley_chang@realtek.com> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://lore.kernel.org/r/20230505025104.18321-1-stanley_chang@realtek.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -1800,6 +1800,17 @@ static int dwc3_probe(struct platform_device *pdev)
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dwc_res = *res;
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dwc_res.start += DWC3_GLOBALS_REGS_START;
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if (dev->of_node) {
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struct device_node *parent = of_get_parent(dev->of_node);
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if (of_device_is_compatible(parent, "realtek,rtd-dwc3")) {
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dwc_res.start -= DWC3_GLOBALS_REGS_START;
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dwc_res.start += DWC3_RTK_RTD_GLOBALS_REGS_START;
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}
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of_node_put(parent);
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}
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regs = devm_ioremap_resource(dev, &dwc_res);
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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@ -84,6 +84,8 @@
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#define DWC3_OTG_REGS_START 0xcc00
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#define DWC3_OTG_REGS_END 0xccff
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#define DWC3_RTK_RTD_GLOBALS_REGS_START 0x8100
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/* Global Registers */
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#define DWC3_GSBUSCFG0 0xc100
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#define DWC3_GSBUSCFG1 0xc104
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