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ARM: sunxi: add PLL4 support 

This commit adds the PLL4 definition to the sun4i, sun5i and sun7i
device trees. PLL4 is compatible with PLL1.

Signed-off-by: Emilio López <emilio@elopez.com.ar>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Emilio López 2013-12-23 00:32:35 -03:00
parent 6ce4eac1f6
commit ec5589f7a3
4 changed files with 28 additions and 0 deletions
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7
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -66,6 +66,13 @@
clocks = <&osc24M>;
};
pll4: pll4@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
};
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;

7
arch/arm/boot/dts/sun5i-a10s.dtsi
View File

@ -63,6 +63,13 @@
clocks = <&osc24M>;
};
pll4: pll4@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
};
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;

7
arch/arm/boot/dts/sun5i-a13.dtsi
View File

@ -67,6 +67,13 @@
clocks = <&osc24M>;
};
pll4: pll4@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
};
/* dummy is 200M */
cpu: cpu@01c20054 {
#clock-cells = <0>;

7
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -62,6 +62,13 @@
clocks = <&osc24M>;
};
pll4: pll4@01c20018 {
#clock-cells = <0>;
compatible = "allwinner,sun4i-pll1-clk";
reg = <0x01c20018 0x4>;
clocks = <&osc24M>;
};
/*
* This is a dummy clock, to be used as placeholder on
* other mux clocks when a specific parent clock is not