clk: bcm2835: add locking to pll*_on/off methods
Add missing locking to:
* bcm2835_pll_divider_on
* bcm2835_pll_divider_off
to protect the read modify write cycle for the
register access protecting both cm_reg and a2w_reg
registers.
Fixes: 41691b8862
("clk: bcm2835: Add support for programming the
audio domain clocks")
Signed-off-by: Martin Sperl <kernel@martin.sperl.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Reviewed-by: Eric Anholt <eric@anholt.net>
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@ -1085,10 +1085,12 @@ static void bcm2835_pll_divider_off(struct clk_hw *hw)
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struct bcm2835_cprman *cprman = divider->cprman;
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const struct bcm2835_pll_divider_data *data = divider->data;
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spin_lock(&cprman->regs_lock);
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cprman_write(cprman, data->cm_reg,
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(cprman_read(cprman, data->cm_reg) &
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~data->load_mask) | data->hold_mask);
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cprman_write(cprman, data->a2w_reg, A2W_PLL_CHANNEL_DISABLE);
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spin_unlock(&cprman->regs_lock);
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}
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static int bcm2835_pll_divider_on(struct clk_hw *hw)
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@ -1097,12 +1099,14 @@ static int bcm2835_pll_divider_on(struct clk_hw *hw)
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struct bcm2835_cprman *cprman = divider->cprman;
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const struct bcm2835_pll_divider_data *data = divider->data;
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spin_lock(&cprman->regs_lock);
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cprman_write(cprman, data->a2w_reg,
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cprman_read(cprman, data->a2w_reg) &
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~A2W_PLL_CHANNEL_DISABLE);
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cprman_write(cprman, data->cm_reg,
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cprman_read(cprman, data->cm_reg) & ~data->hold_mask);
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spin_unlock(&cprman->regs_lock);
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return 0;
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}
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