ARM: shmobile: kzm9g-reference: Move pinctrl mappings to device tree
Replace the pinctrl mappings in board code by device tree mappings. For devices that are still instantiated from board code reference the mappings as the default pin controller state to apply them at boot time. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -145,19 +145,70 @@
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};
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};
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&i2c3 {
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pinctrl-0 = <&i2c3_pins>;
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pinctrl-names = "default";
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};
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&mmcif {
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pinctrl-0 = <&mmcif_pins>;
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pinctrl-names = "default";
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bus-width = <8>;
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vmmc-supply = <®_1p8v>;
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status = "okay";
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};
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&pfc {
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pinctrl-0 = <&scifa4_pins>;
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pinctrl-names = "default";
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i2c3_pins: i2c3 {
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renesas,groups = "i2c3_1";
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renesas,function = "i2c3";
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};
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mmcif_pins: mmcif {
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mux {
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renesas,groups = "mmc0_data8_0", "mmc0_ctrl_0";
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renesas,function = "mmc0";
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};
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cfg {
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renesas,groups = "mmc0_data8_0";
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renesas,pins = "PORT279";
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bias-pull-up;
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};
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};
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scifa4_pins: scifa4 {
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renesas,groups = "scifa4_data", "scifa4_ctrl";
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renesas,function = "scifa4";
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};
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sdhi0_pins: sdhi0 {
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renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd", "sdhi0_wp";
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renesas,function = "sdhi0";
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};
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sdhi2_pins: sdhi2 {
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renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
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renesas,function = "sdhi2";
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};
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};
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&sdhi0 {
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pinctrl-0 = <&sdhi0_pins>;
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pinctrl-names = "default";
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vmmc-supply = <®_3p3v>;
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bus-width = <4>;
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status = "okay";
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};
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&sdhi2 {
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pinctrl-0 = <&sdhi2_pins>;
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pinctrl-names = "default";
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vmmc-supply = <®_3p3v>;
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bus-width = <4>;
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broken-cd;
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@ -27,55 +27,15 @@
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#include <linux/irqchip.h>
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#include <linux/input.h>
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#include <linux/of_platform.h>
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#include <linux/pinctrl/machine.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <mach/sh73a0.h>
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#include <mach/common.h>
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#include <asm/hardware/cache-l2x0.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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static unsigned long pin_pullup_conf[] = {
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PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 0),
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};
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static const struct pinctrl_map kzm_pinctrl_map[] = {
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PIN_MAP_MUX_GROUP_DEFAULT("e6826000.i2c", "e6050000.pfc",
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"i2c3_1", "i2c3"),
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/* MMCIF */
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PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
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"mmc0_data8_0", "mmc0"),
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PIN_MAP_MUX_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
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"mmc0_ctrl_0", "mmc0"),
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PIN_MAP_CONFIGS_PIN_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
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"PORT279", pin_pullup_conf),
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PIN_MAP_CONFIGS_GROUP_DEFAULT("e6bd0000.mmcif", "e6050000.pfc",
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"mmc0_data8_0", pin_pullup_conf),
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/* SCIFA4 */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
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"scifa4_data", "scifa4"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.4", "e6050000.pfc",
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"scifa4_ctrl", "scifa4"),
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/* SDHI0 */
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PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
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"sdhi0_data4", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
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"sdhi0_ctrl", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
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"sdhi0_cd", "sdhi0"),
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PIN_MAP_MUX_GROUP_DEFAULT("ee100000.sdhi", "e6050000.pfc",
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"sdhi0_wp", "sdhi0"),
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/* SDHI2 */
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PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
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"sdhi2_data4", "sdhi2"),
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PIN_MAP_MUX_GROUP_DEFAULT("ee140000.sdhi", "e6050000.pfc",
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"sdhi2_ctrl", "sdhi2"),
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};
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static void __init kzm_init(void)
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{
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sh73a0_add_standard_devices_dt();
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pinctrl_register_mappings(kzm_pinctrl_map, ARRAY_SIZE(kzm_pinctrl_map));
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/* enable SD */
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gpio_request_one(15, GPIOF_OUT_INIT_HIGH, NULL); /* power */
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