drm/i915: Terminate the FORCE WAKE after we have finished reading
Once we have read the value out of the GT power well, we need to remove the FORCE WAKE bit to allow the system to auto-power down. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
parent
a8e93126a6
commit
eb43f4af7e
|
@ -244,6 +244,28 @@ void intel_detect_pch (struct drm_device *dev)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
void __gen6_force_wake_get(struct drm_i915_private *dev_priv)
|
||||||
|
{
|
||||||
|
int count;
|
||||||
|
|
||||||
|
count = 0;
|
||||||
|
while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
|
||||||
|
udelay(10);
|
||||||
|
|
||||||
|
I915_WRITE_NOTRACE(FORCEWAKE, 1);
|
||||||
|
POSTING_READ(FORCEWAKE);
|
||||||
|
|
||||||
|
count = 0;
|
||||||
|
while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1) == 0)
|
||||||
|
udelay(10);
|
||||||
|
}
|
||||||
|
|
||||||
|
void __gen6_force_wake_put(struct drm_i915_private *dev_priv)
|
||||||
|
{
|
||||||
|
I915_WRITE_NOTRACE(FORCEWAKE, 0);
|
||||||
|
POSTING_READ(FORCEWAKE);
|
||||||
|
}
|
||||||
|
|
||||||
static int i915_drm_freeze(struct drm_device *dev)
|
static int i915_drm_freeze(struct drm_device *dev)
|
||||||
{
|
{
|
||||||
struct drm_i915_private *dev_priv = dev->dev_private;
|
struct drm_i915_private *dev_priv = dev->dev_private;
|
||||||
|
|
|
@ -1341,17 +1341,20 @@ __i915_write(64, q)
|
||||||
* must be set to prevent GT core from power down and stale values being
|
* must be set to prevent GT core from power down and stale values being
|
||||||
* returned.
|
* returned.
|
||||||
*/
|
*/
|
||||||
|
void __gen6_force_wake_get(struct drm_i915_private *dev_priv);
|
||||||
|
void __gen6_force_wake_put (struct drm_i915_private *dev_priv);
|
||||||
static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg)
|
static inline u32 i915_safe_read(struct drm_i915_private *dev_priv, u32 reg)
|
||||||
{
|
{
|
||||||
if (IS_GEN6(dev_priv->dev)) {
|
u32 val;
|
||||||
I915_WRITE_NOTRACE(FORCEWAKE, 1);
|
|
||||||
POSTING_READ(FORCEWAKE);
|
if (dev_priv->info->gen >= 6) {
|
||||||
/* XXX How long do we really need to wait here?
|
__gen6_force_wake_get(dev_priv);
|
||||||
* Will different registers/engines require different periods?
|
val = I915_READ(reg);
|
||||||
*/
|
__gen6_force_wake_put(dev_priv);
|
||||||
udelay(100);
|
} else
|
||||||
}
|
val = I915_READ(reg);
|
||||||
return I915_READ(reg);
|
|
||||||
|
return val;
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline void
|
static inline void
|
||||||
|
|
|
@ -3115,4 +3115,5 @@
|
||||||
#define EDP_LINK_TRAIN_VOL_EMP_MASK_SNB (0x3f<<22)
|
#define EDP_LINK_TRAIN_VOL_EMP_MASK_SNB (0x3f<<22)
|
||||||
|
|
||||||
#define FORCEWAKE 0xA18C
|
#define FORCEWAKE 0xA18C
|
||||||
|
#define FORCEWAKE_ACK 0x130090
|
||||||
#endif /* _I915_REG_H_ */
|
#endif /* _I915_REG_H_ */
|
||||||
|
|
Loading…
Reference in New Issue