ARC: ensure futex ops are atomic in !LLSC config
W/o hardware assisted atomic r-m-w the best we can do is to disable preemption. Cc: David Hildenbrand <dahi@linux.vnet.ibm.com> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Michel Lespinasse <walken@google.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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@ -87,6 +87,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
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return -EFAULT;
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_disable(); /* to guarantee atomic r-m-w of futex op */
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#endif
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pagefault_disable();
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switch (op) {
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@ -111,6 +114,9 @@ static inline int futex_atomic_op_inuser(int encoded_op, u32 __user *uaddr)
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}
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pagefault_enable();
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_enable();
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#endif
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if (!ret) {
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switch (cmp) {
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@ -153,6 +159,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,
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if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
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return -EFAULT;
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_disable(); /* to guarantee atomic r-m-w of futex op */
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#endif
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smp_mb();
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__asm__ __volatile__(
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@ -182,6 +191,9 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr, u32 expval,
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smp_mb();
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#ifndef CONFIG_ARC_HAS_LLSC
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preempt_enable();
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#endif
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*uval = existval;
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return ret;
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}
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