drm/amd/powerplay: update smu11_driver_if_navi10.h
update the smu11_driver_if_navi10.h since navi10 smu fw update to 42.15.0 Signed-off-by: Kenneth Feng <kenneth.feng@amd.com> Reviewed-by: Xiaojie Yuan <xiaojie.yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -4,7 +4,7 @@
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// *** IMPORTANT ***
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// *** IMPORTANT ***
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// SMU TEAM: Always increment the interface version if
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// SMU TEAM: Always increment the interface version if
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// any structure is changed in this file
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// any structure is changed in this file
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#define SMU11_DRIVER_IF_VERSION 0x2E
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#define SMU11_DRIVER_IF_VERSION 0x2F
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#define PPTABLE_NV10_SMU_VERSION 8
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#define PPTABLE_NV10_SMU_VERSION 8
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@ -689,8 +689,11 @@ typedef struct {
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// BTC Setting
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// BTC Setting
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uint32_t BtcConfig;
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uint32_t BtcConfig;
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uint16_t SsFmin[10]; // PPtable value to function similar to VFTFmin for SS Curve; Size is PPCLK_COUNT rounded to nearest multiple of 2
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uint16_t DcBtcGb[AVFS_VOLTAGE_COUNT];
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// SECTION: Board Reserved
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// SECTION: Board Reserved
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uint32_t Reserved[14];
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uint32_t Reserved[8];
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// SECTION: BOARD PARAMETERS
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// SECTION: BOARD PARAMETERS
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// I2C Control
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// I2C Control
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@ -1027,17 +1030,9 @@ typedef struct {
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//RLC Pace Table total number of levels
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//RLC Pace Table total number of levels
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#define RLC_PACE_TABLE_NUM_LEVELS 16
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#define RLC_PACE_TABLE_NUM_LEVELS 16
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#define RLC_PACE_RATIO_NUM_LEVELS 8
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typedef struct {
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typedef struct {
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uint8_t ByteRatioLow;
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float FlopsPerByteTable[RLC_PACE_TABLE_NUM_LEVELS];
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uint8_t FlopsRatioLow;
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uint8_t ByteRatioHigh;
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uint8_t FlopsRatioHigh;
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} RlcPaceFlopsPerByte_t;
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typedef struct {
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RlcPaceFlopsPerByte_t FlopsPerByteTable[RLC_PACE_RATIO_NUM_LEVELS];
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uint32_t MmHubPadding[8]; // SMU internal use
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uint32_t MmHubPadding[8]; // SMU internal use
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} RlcPaceFlopsPerByteOverride_t;
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} RlcPaceFlopsPerByteOverride_t;
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