drm/i915: gen7: implement rczunit workaround
This is yet another workaround related to clock gating which we need on Ivy Bridge. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41353 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44610 Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Kenneth Graunke <kenneth@whitecape.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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@ -3618,6 +3618,7 @@
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#define GT_FIFO_NUM_RESERVED_ENTRIES 20
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#define GEN6_UCGCTL2 0x9404
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# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
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# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
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# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11)
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@ -8461,6 +8461,11 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
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I915_WRITE(WM2_LP_ILK, 0);
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I915_WRITE(WM1_LP_ILK, 0);
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/* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
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* This implements the WaDisableRCZUnitClockGating workaround.
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*/
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I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
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I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
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I915_WRITE(IVB_CHICKEN3,
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