AMD IOMMU: struct amd_iommu remove padding on 64 bit
Remove 16 bytes of padding from struct amd_iommu on 64bit builds reducing its size to 120 bytes, allowing it to span one fewer cachelines. Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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@ -251,13 +251,6 @@ struct amd_iommu {
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/* Pointer to PCI device of this IOMMU */
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struct pci_dev *dev;
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/*
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* Capability pointer. There could be more than one IOMMU per PCI
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* device function if there are more than one AMD IOMMU capability
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* pointers.
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*/
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u16 cap_ptr;
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/* physical address of MMIO space */
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u64 mmio_phys;
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/* virtual address of MMIO space */
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@ -266,6 +259,13 @@ struct amd_iommu {
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/* capabilities of that IOMMU read from ACPI */
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u32 cap;
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/*
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* Capability pointer. There could be more than one IOMMU per PCI
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* device function if there are more than one AMD IOMMU capability
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* pointers.
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*/
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u16 cap_ptr;
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/* pci domain of this IOMMU */
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u16 pci_seg;
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@ -284,19 +284,19 @@ struct amd_iommu {
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/* size of command buffer */
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u32 cmd_buf_size;
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/* event buffer virtual address */
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u8 *evt_buf;
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/* size of event buffer */
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u32 evt_buf_size;
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/* event buffer virtual address */
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u8 *evt_buf;
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/* MSI number for event interrupt */
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u16 evt_msi_num;
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/* if one, we need to send a completion wait command */
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int need_sync;
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/* true if interrupts for this IOMMU are already enabled */
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bool int_enabled;
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/* if one, we need to send a completion wait command */
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int need_sync;
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/* default dma_ops domain for that IOMMU */
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struct dma_ops_domain *default_dom;
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};
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