arm64: dts: imx93: add FEC support
Add FEC node for imx93 platform. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -558,6 +558,32 @@
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status = "disabled";
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status = "disabled";
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};
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};
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fec: ethernet@42890000 {
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compatible = "fsl,imx93-fec", "fsl,imx8mq-fec", "fsl,imx6sx-fec";
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reg = <0x42890000 0x10000>;
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interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX93_CLK_ENET1_GATE>,
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<&clk IMX93_CLK_ENET1_GATE>,
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<&clk IMX93_CLK_ENET_TIMER1>,
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<&clk IMX93_CLK_ENET_REF>,
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<&clk IMX93_CLK_ENET_REF_PHY>;
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clock-names = "ipg", "ahb", "ptp",
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"enet_clk_ref", "enet_out";
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assigned-clocks = <&clk IMX93_CLK_ENET_TIMER1>,
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<&clk IMX93_CLK_ENET_REF>,
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<&clk IMX93_CLK_ENET_REF_PHY>;
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assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
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<&clk IMX93_CLK_SYS_PLL_PFD0_DIV2>,
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<&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;
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assigned-clock-rates = <100000000>, <250000000>, <50000000>;
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fsl,num-tx-queues = <3>;
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fsl,num-rx-queues = <3>;
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status = "disabled";
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};
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usdhc3: mmc@428b0000 {
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usdhc3: mmc@428b0000 {
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compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
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compatible = "fsl,imx93-usdhc", "fsl,imx8mm-usdhc";
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reg = <0x428b0000 0x10000>;
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reg = <0x428b0000 0x10000>;
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