[SCSI] be2iscsi: Fix support for handling CQ_CREATE V2 version.
For latest adapters, V2 version of cq_create MBX_CMD is to be used. When driver is loaded depending on the adapter type appropriate cq_create command will be called. Signed-off-by: John Soni Jose <sony.john-n@emulex.com> Signed-off-by: Jayamohan Kallickal <jayamohan.kallickal@emulex.com> Reviewed-by: Mike Christie <michaelc@cs.wisc.edu> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
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@ -649,18 +649,34 @@ int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl,
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OPCODE_COMMON_CQ_CREATE, sizeof(*req));
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req->num_pages = cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
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if (chip_skh_r(ctrl->pdev)) {
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req->hdr.version = MBX_CMD_VER2;
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req->page_size = 1;
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AMAP_SET_BITS(struct amap_cq_context_v2, coalescwm,
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ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context_v2, nodelay,
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ctxt, no_delay);
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AMAP_SET_BITS(struct amap_cq_context_v2, count, ctxt,
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__ilog2_u32(cq->len / 256));
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AMAP_SET_BITS(struct amap_cq_context_v2, valid, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eventable, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context_v2, eqid, ctxt, eq->id);
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AMAP_SET_BITS(struct amap_cq_context_v2, armed, ctxt, 1);
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} else {
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AMAP_SET_BITS(struct amap_cq_context, coalescwm,
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ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
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AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
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__ilog2_u32(cq->len / 256));
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AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
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AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
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AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, func, ctxt,
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PCI_FUNC(ctrl->pdev->devfn));
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}
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AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
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AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
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AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
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__ilog2_u32(cq->len / 256));
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AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
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AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
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AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 1);
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AMAP_SET_BITS(struct amap_cq_context, func, ctxt,
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PCI_FUNC(ctrl->pdev->devfn));
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be_dws_cpu_to_le(ctxt, sizeof(req->context));
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be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
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@ -58,6 +58,9 @@ struct be_mcc_wrb {
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#define CQE_STATUS_EXTD_MASK 0xFFFF
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#define CQE_STATUS_EXTD_SHIFT 16 /* bits 0 - 15 */
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/* MBOX Command VER */
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#define MBX_CMD_VER2 0x02
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struct be_mcc_compl {
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u32 status; /* dword 0 */
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u32 tag0; /* dword 1 */
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@ -183,7 +186,8 @@ struct be_cmd_req_hdr {
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u8 domain; /* dword 0 */
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u32 timeout; /* dword 1 */
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u32 request_length; /* dword 2 */
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u32 rsvd0; /* dword 3 */
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u8 version; /* dword 3 */
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u8 rsvd0[3]; /* dword 3 */
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};
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struct be_cmd_resp_hdr {
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@ -483,10 +487,28 @@ struct amap_cq_context {
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u8 rsvd5[32]; /* dword 3 */
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} __packed;
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struct amap_cq_context_v2 {
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u8 rsvd0[12]; /* dword 0 */
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u8 coalescwm[2]; /* dword 0 */
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u8 nodelay; /* dword 0 */
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u8 rsvd1[12]; /* dword 0 */
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u8 count[2]; /* dword 0 */
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u8 valid; /* dword 0 */
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u8 rsvd2; /* dword 0 */
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u8 eventable; /* dword 0 */
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u8 eqid[16]; /* dword 1 */
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u8 rsvd3[15]; /* dword 1 */
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u8 armed; /* dword 1 */
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u8 cqecount[16];/* dword 2 */
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u8 rsvd4[16]; /* dword 2 */
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u8 rsvd5[32]; /* dword 3 */
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};
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struct be_cmd_req_cq_create {
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struct be_cmd_req_hdr hdr;
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u16 num_pages;
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u16 rsvd0;
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u8 page_size;
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u8 rsvd0;
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u8 context[sizeof(struct amap_cq_context) / 8];
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struct phys_addr pages[4];
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} __packed;
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@ -265,6 +265,7 @@ struct invalidate_command_table {
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unsigned short cid;
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} __packed;
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#define chip_skh_r(pdev) (pdev->device == OC_SKH_ID1)
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struct beiscsi_hba {
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struct hba_parameters params;
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struct hwi_controller *phwi_ctrlr;
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