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mmc: mmci: Add support for sdmmc variant revision v3.0 

This is an update of the SDMMC revision v2.2, with just an increased
FIFO size, from 64B to 1kB.

Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Link: https://lore.kernel.org/r/20230619115120.64474-4-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Yann Gautier 2023-06-19 13:51:17 +02:00 committed by Ulf Hansson
parent 88167e6c2e
commit ea9ca04119
1 changed files with 33 additions and 0 deletions
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33
drivers/mmc/host/mmci.c
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@ -306,6 +306,34 @@ static struct variant_data variant_stm32_sdmmcv2 = {
.init = sdmmc_variant_init,
};
static struct variant_data variant_stm32_sdmmcv3 = {
.fifosize = 256 * 4,
.fifohalfsize = 128 * 4,
.f_max = 267000000,
.stm32_clkdiv = true,
.cmdreg_cpsm_enable = MCI_CPSM_STM32_ENABLE,
.cmdreg_lrsp_crc = MCI_CPSM_STM32_LRSP_CRC,
.cmdreg_srsp_crc = MCI_CPSM_STM32_SRSP_CRC,
.cmdreg_srsp = MCI_CPSM_STM32_SRSP,
.cmdreg_stop = MCI_CPSM_STM32_CMDSTOP,
.data_cmd_enable = MCI_CPSM_STM32_CMDTRANS,
.irq_pio_mask = MCI_IRQ_PIO_STM32_MASK,
.datactrl_first = true,
.datacnt_useless = true,
.datalength_bits = 25,
.datactrl_blocksz = 14,
.datactrl_any_blocksz = true,
.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
.stm32_idmabsize_mask = GENMASK(16, 6),
.stm32_idmabsize_align = BIT(6),
.dma_lli = true,
.busy_timeout = true,
.busy_detect = true,
.busy_detect_flag = MCI_STM32_BUSYD0,
.busy_detect_mask = MCI_STM32_BUSYD0ENDMASK,
.init = sdmmc_variant_init,
};
static struct variant_data variant_qcom = {
.fifosize = 16 * 4,
.fifohalfsize = 8 * 4,
@ -2509,6 +2537,11 @@ static const struct amba_id mmci_ids[] = {
.mask = 0xf0ffffff,
.data = &variant_stm32_sdmmcv2,
},
{
.id = 0x00353180,
.mask = 0xf0ffffff,
.data = &variant_stm32_sdmmcv3,
},
/* Qualcomm variants */
{
.id = 0x00051180,