atp870u: Untangle tmport #4
Untangle the tmport crap so it becomes obvious what ports are accessed. Signed-off-by: Ondrej Zary <linux@rainbow-software.org> Reviewed-by: Hannes Reinicke <hare@suse.de> Acked-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Ondrej Zary
Martin K. Petersen
parent
1940ed62f9
commit
ea41ed600b
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@ -1207,7 +1207,6 @@ G2Q_QUIN: /* k=binID#, */
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static void is870(struct atp_unit *dev, unsigned int wkport)
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{
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unsigned int tmport;
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unsigned char i, j, k, rmb, n;
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unsigned short int m;
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static unsigned char mbuf[512];
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@ -1218,8 +1217,7 @@ static void is870(struct atp_unit *dev, unsigned int wkport)
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static unsigned char synw[6] = { 0x80, 1, 3, 1, 0x0c, 0x07 };
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static unsigned char wide[6] = { 0x80, 1, 2, 3, 1, 0 };
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tmport = wkport + 0x3a;
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outb((unsigned char) (inb(tmport) | 0x10), tmport);
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outb((unsigned char) (inb(wkport + 0x3a) | 0x10), wkport + 0x3a);
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for (i = 0; i < 16; i++) {
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if ((dev->chip_ver != 4) && (i > 7)) {
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@ -1234,135 +1232,105 @@ static void is870(struct atp_unit *dev, unsigned int wkport)
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printk(KERN_INFO " ID: %2d Host Adapter\n", dev->host_id[0]);
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continue;
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}
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tmport = wkport + 0x1b;
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if (dev->chip_ver == 4) {
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outb(0x01, tmport);
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outb(0x01, wkport + 0x1b);
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} else {
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outb(0x00, tmport);
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outb(0x00, wkport + 0x1b);
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}
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tmport = wkport + 1;
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outb(0x08, tmport++);
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outb(0x7f, tmport++);
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outb(satn[0], tmport++);
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outb(satn[1], tmport++);
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outb(satn[2], tmport++);
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outb(satn[3], tmport++);
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outb(satn[4], tmport++);
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outb(satn[5], tmport++);
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tmport += 0x06;
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outb(0, tmport);
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tmport += 0x02;
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outb(dev->id[0][i].devsp, tmport++);
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outb(0, tmport++);
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outb(satn[6], tmport++);
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outb(satn[7], tmport++);
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outb(0x08, wkport + 1);
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outb(0x7f, wkport + 2);
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outb(satn[0], wkport + 3);
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outb(satn[1], wkport + 4);
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outb(satn[2], wkport + 5);
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outb(satn[3], wkport + 6);
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outb(satn[4], wkport + 7);
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outb(satn[5], wkport + 8);
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outb(0, wkport + 0x0f);
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outb(dev->id[0][i].devsp, wkport + 0x11);
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outb(0, wkport + 0x12);
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outb(satn[6], wkport + 0x13);
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outb(satn[7], wkport + 0x14);
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j = i;
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if ((j & 0x08) != 0) {
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j = (j & 0x07) | 0x40;
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}
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outb(j, tmport);
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tmport += 0x03;
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outb(satn[8], tmport);
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tmport += 0x07;
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outb(j, wkport + 0x15);
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outb(satn[8], wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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if (inb(tmport) != 0x11 && inb(tmport) != 0x8e)
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if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
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continue;
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while (inb(tmport) != 0x8e)
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while (inb(wkport + 0x17) != 0x8e)
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cpu_relax();
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dev->active_id[0] |= m;
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tmport = wkport + 0x10;
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outb(0x30, tmport);
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tmport = wkport + 0x04;
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outb(0x00, tmport);
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outb(0x30, wkport + 0x10);
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outb(0x00, wkport + 0x04);
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phase_cmd:
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tmport = wkport + 0x18;
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outb(0x08, tmport);
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tmport += 0x07;
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while ((inb(tmport) & 0x80) == 0x00)
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outb(0x08, wkport + 0x18);
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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j = inb(tmport);
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j = inb(wkport + 0x17);
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if (j != 0x16) {
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tmport = wkport + 0x10;
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outb(0x41, tmport);
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outb(0x41, wkport + 0x10);
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goto phase_cmd;
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}
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sel_ok:
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tmport = wkport + 3;
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outb(inqd[0], tmport++);
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outb(inqd[1], tmport++);
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outb(inqd[2], tmport++);
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outb(inqd[3], tmport++);
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outb(inqd[4], tmport++);
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outb(inqd[5], tmport);
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tmport += 0x07;
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outb(0, tmport);
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tmport += 0x02;
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outb(dev->id[0][i].devsp, tmport++);
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outb(0, tmport++);
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outb(inqd[6], tmport++);
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outb(inqd[7], tmport++);
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tmport += 0x03;
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outb(inqd[8], tmport);
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tmport += 0x07;
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outb(inqd[0], wkport + 3);
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outb(inqd[1], wkport + 4);
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outb(inqd[2], wkport + 5);
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outb(inqd[3], wkport + 6);
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outb(inqd[4], wkport + 7);
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outb(inqd[5], wkport + 8);
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outb(0, wkport + 0x0f);
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outb(dev->id[0][i].devsp, wkport + 0x11);
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outb(0, wkport + 0x12);
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outb(inqd[6], wkport + 0x13);
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outb(inqd[7], wkport + 0x14);
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outb(inqd[8], wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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if (inb(tmport) != 0x11 && inb(tmport) != 0x8e)
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if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
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continue;
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while (inb(tmport) != 0x8e)
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while (inb(wkport + 0x17) != 0x8e)
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cpu_relax();
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tmport = wkport + 0x1b;
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if (dev->chip_ver == 4)
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outb(0x00, tmport);
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outb(0x00, wkport + 0x1b);
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tmport = wkport + 0x18;
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outb(0x08, tmport);
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tmport += 0x07;
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outb(0x08, wkport + 0x18);
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j = 0;
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rd_inq_data:
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k = inb(tmport);
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k = inb(wkport + 0x1f);
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if ((k & 0x01) != 0) {
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tmport -= 0x06;
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mbuf[j++] = inb(tmport);
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tmport += 0x06;
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mbuf[j++] = inb(wkport + 0x19);
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goto rd_inq_data;
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}
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if ((k & 0x80) == 0) {
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goto rd_inq_data;
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}
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tmport -= 0x08;
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j = inb(tmport);
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j = inb(wkport + 0x17);
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if (j == 0x16) {
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goto inq_ok;
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}
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tmport = wkport + 0x10;
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outb(0x46, tmport);
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tmport += 0x02;
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outb(0, tmport++);
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outb(0, tmport++);
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outb(0, tmport++);
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tmport += 0x03;
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outb(0x08, tmport);
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tmport += 0x07;
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outb(0x46, wkport + 0x10);
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outb(0, wkport + 0x12);
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outb(0, wkport + 0x13);
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outb(0, wkport + 0x14);
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outb(0x08, wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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if (inb(tmport) != 0x16) {
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if (inb(wkport + 0x17) != 0x16) {
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goto sel_ok;
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}
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inq_ok:
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@ -1380,57 +1348,43 @@ inq_ok:
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if ((dev->global_map[0] & 0x20) == 0) {
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goto not_wide;
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}
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tmport = wkport + 0x1b;
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outb(0x01, tmport);
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tmport = wkport + 3;
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outb(satn[0], tmport++);
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outb(satn[1], tmport++);
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outb(satn[2], tmport++);
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outb(satn[3], tmport++);
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outb(satn[4], tmport++);
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outb(satn[5], tmport++);
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tmport += 0x06;
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outb(0, tmport);
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tmport += 0x02;
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outb(dev->id[0][i].devsp, tmport++);
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outb(0, tmport++);
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outb(satn[6], tmport++);
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outb(satn[7], tmport++);
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tmport += 0x03;
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outb(satn[8], tmport);
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tmport += 0x07;
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outb(0x01, wkport + 0x1b);
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outb(satn[0], wkport + 3);
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outb(satn[1], wkport + 4);
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outb(satn[2], wkport + 5);
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outb(satn[3], wkport + 6);
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outb(satn[4], wkport + 7);
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outb(satn[5], wkport + 8);
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outb(0, wkport + 0x0f);
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outb(dev->id[0][i].devsp, wkport + 0x11);
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outb(0, wkport + 0x12);
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outb(satn[6], wkport + 0x13);
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outb(satn[7], wkport + 0x14);
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outb(satn[8], wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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if (inb(tmport) != 0x11 && inb(tmport) != 0x8e)
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if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
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continue;
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while (inb(tmport) != 0x8e)
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while (inb(wkport + 0x17) != 0x8e)
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cpu_relax();
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try_wide:
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j = 0;
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tmport = wkport + 0x14;
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outb(0x05, tmport);
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tmport += 0x04;
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outb(0x20, tmport);
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tmport += 0x07;
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outb(0x05, wkport + 0x14);
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outb(0x20, wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0) {
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if ((inb(tmport) & 0x01) != 0) {
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tmport -= 0x06;
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outb(wide[j++], tmport);
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tmport += 0x06;
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}
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while ((inb(wkport + 0x1f) & 0x80) == 0) {
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if ((inb(wkport + 0x1f) & 0x01) != 0)
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outb(wide[j++], wkport + 0x19);
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}
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tmport -= 0x08;
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x17) & 0x80) == 0x00)
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cpu_relax();
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j = inb(tmport) & 0x0f;
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j = inb(wkport + 0x17) & 0x0f;
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if (j == 0x0f) {
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goto widep_in;
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}
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@ -1442,18 +1396,12 @@ try_wide:
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}
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continue;
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widep_out:
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tmport = wkport + 0x18;
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outb(0x20, tmport);
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tmport += 0x07;
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while ((inb(tmport) & 0x80) == 0) {
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if ((inb(tmport) & 0x01) != 0) {
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tmport -= 0x06;
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outb(0, tmport);
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tmport += 0x06;
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}
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outb(0x20, wkport + 0x18);
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while ((inb(wkport + 0x1f) & 0x80) == 0) {
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if ((inb(wkport + 0x1f) & 0x01) != 0)
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outb(0, wkport + 0x19);
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}
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tmport -= 0x08;
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j = inb(tmport) & 0x0f;
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j = inb(wkport + 0x17) & 0x0f;
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if (j == 0x0f) {
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goto widep_in;
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}
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@ -1465,25 +1413,19 @@ widep_out:
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}
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continue;
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widep_in:
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tmport = wkport + 0x14;
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outb(0xff, tmport);
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tmport += 0x04;
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outb(0x20, tmport);
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tmport += 0x07;
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outb(0xff, wkport + 0x14);
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outb(0x20, wkport + 0x18);
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k = 0;
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widep_in1:
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j = inb(tmport);
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j = inb(wkport + 0x1f);
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if ((j & 0x01) != 0) {
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tmport -= 0x06;
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mbuf[k++] = inb(tmport);
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tmport += 0x06;
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mbuf[k++] = inb(wkport + 0x19);
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goto widep_in1;
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}
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if ((j & 0x80) == 0x00) {
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goto widep_in1;
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}
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tmport -= 0x08;
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j = inb(tmport) & 0x0f;
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j = inb(wkport + 0x17) & 0x0f;
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if (j == 0x0f) {
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goto widep_in;
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}
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@ -1495,19 +1437,14 @@ widep_in1:
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}
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continue;
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widep_cmd:
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tmport = wkport + 0x10;
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outb(0x30, tmport);
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tmport = wkport + 0x14;
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outb(0x00, tmport);
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tmport += 0x04;
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outb(0x08, tmport);
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tmport += 0x07;
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outb(0x30, wkport + 0x10);
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outb(0x00, wkport + 0x14);
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outb(0x08, wkport + 0x18);
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while ((inb(tmport) & 0x80) == 0x00)
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while ((inb(wkport + 0x1f) & 0x80) == 0x00)
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cpu_relax();
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tmport -= 0x08;
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j = inb(tmport);
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j = inb(wkport + 0x17);
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if (j != 0x16) {
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if (j == 0x4e) {
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goto widep_out;
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@ -1535,69 +1472,56 @@ not_wide:
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}
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continue;
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set_sync:
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tmport = wkport + 0x1b;
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j = 0;
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if ((m & dev->wide_id[0]) != 0) {
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j |= 0x01;
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}
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outb(j, tmport);
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tmport = wkport + 3;
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outb(satn[0], tmport++);
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outb(satn[1], tmport++);
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outb(satn[2], tmport++);
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outb(satn[3], tmport++);
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outb(satn[4], tmport++);
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outb(satn[5], tmport++);
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tmport += 0x06;
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outb(0, tmport);
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tmport += 0x02;
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outb(dev->id[0][i].devsp, tmport++);
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outb(0, tmport++);
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outb(satn[6], tmport++);
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outb(satn[7], tmport++);
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tmport += 0x03;
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outb(satn[8], tmport);
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tmport += 0x07;
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outb(j, wkport + 0x1b);
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outb(satn[0], wkport + 3);
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outb(satn[1], wkport + 4);
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outb(satn[2], wkport + 5);
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outb(satn[3], wkport + 6);
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outb(satn[4], wkport + 7);
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outb(satn[5], wkport + 8);
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outb(0, wkport + 0x0f);
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outb(dev->id[0][i].devsp, wkport + 0x11);
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outb(0, wkport + 0x12);
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outb(satn[6], wkport + 0x13);
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outb(satn[7], wkport + 0x14);
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outb(satn[8], wkport + 0x18);
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||||
while ((inb(tmport) & 0x80) == 0x00)
|
||||
while ((inb(wkport + 0x1f) & 0x80) == 0x00)
|
||||
cpu_relax();
|
||||
|
||||
tmport -= 0x08;
|
||||
if (inb(tmport) != 0x11 && inb(tmport) != 0x8e)
|
||||
if (inb(wkport + 0x17) != 0x11 && inb(wkport + 0x17) != 0x8e)
|
||||
continue;
|
||||
|
||||
while (inb(tmport) != 0x8e)
|
||||
while (inb(wkport + 0x17) != 0x8e)
|
||||
cpu_relax();
|
||||
|
||||
try_sync:
|
||||
j = 0;
|
||||
tmport = wkport + 0x14;
|
||||
outb(0x06, tmport);
|
||||
tmport += 0x04;
|
||||
outb(0x20, tmport);
|
||||
tmport += 0x07;
|
||||
outb(0x06, wkport + 0x14);
|
||||
outb(0x20, wkport + 0x18);
|
||||
|
||||
while ((inb(tmport) & 0x80) == 0) {
|
||||
if ((inb(tmport) & 0x01) != 0) {
|
||||
tmport -= 0x06;
|
||||
while ((inb(wkport + 0x1f) & 0x80) == 0) {
|
||||
if ((inb(wkport + 0x1f) & 0x01) != 0) {
|
||||
if ((m & dev->wide_id[0]) != 0) {
|
||||
outb(synw[j++], tmport);
|
||||
outb(synw[j++], wkport + 0x19);
|
||||
} else {
|
||||
if ((m & dev->ultra_map[0]) != 0) {
|
||||
outb(synu[j++], tmport);
|
||||
outb(synu[j++], wkport + 0x19);
|
||||
} else {
|
||||
outb(synn[j++], tmport);
|
||||
outb(synn[j++], wkport + 0x19);
|
||||
}
|
||||
}
|
||||
tmport += 0x06;
|
||||
}
|
||||
}
|
||||
tmport -= 0x08;
|
||||
|
||||
while ((inb(tmport) & 0x80) == 0x00)
|
||||
while ((inb(wkport + 0x17) & 0x80) == 0x00)
|
||||
cpu_relax();
|
||||
|
||||
j = inb(tmport) & 0x0f;
|
||||
j = inb(wkport + 0x17) & 0x0f;
|
||||
if (j == 0x0f) {
|
||||
goto phase_ins;
|
||||
}
|
||||
|
|
@ -1609,18 +1533,12 @@ try_sync:
|
|||
}
|
||||
continue;
|
||||
phase_outs:
|
||||
tmport = wkport + 0x18;
|
||||
outb(0x20, tmport);
|
||||
tmport += 0x07;
|
||||
while ((inb(tmport) & 0x80) == 0x00) {
|
||||
if ((inb(tmport) & 0x01) != 0x00) {
|
||||
tmport -= 0x06;
|
||||
outb(0x00, tmport);
|
||||
tmport += 0x06;
|
||||
}
|
||||
outb(0x20, wkport + 0x18);
|
||||
while ((inb(wkport + 0x1f) & 0x80) == 0x00) {
|
||||
if ((inb(wkport + 0x1f) & 0x01) != 0x00)
|
||||
outb(0x00, wkport + 0x19);
|
||||
}
|
||||
tmport -= 0x08;
|
||||
j = inb(tmport);
|
||||
j = inb(wkport + 0x17);
|
||||
if (j == 0x85) {
|
||||
goto tar_dcons;
|
||||
}
|
||||
|
|
@ -1636,29 +1554,23 @@ phase_outs:
|
|||
}
|
||||
continue;
|
||||
phase_ins:
|
||||
tmport = wkport + 0x14;
|
||||
outb(0xff, tmport);
|
||||
tmport += 0x04;
|
||||
outb(0x20, tmport);
|
||||
tmport += 0x07;
|
||||
outb(0xff, wkport + 0x14);
|
||||
outb(0x20, wkport + 0x18);
|
||||
k = 0;
|
||||
phase_ins1:
|
||||
j = inb(tmport);
|
||||
j = inb(wkport + 0x1f);
|
||||
if ((j & 0x01) != 0x00) {
|
||||
tmport -= 0x06;
|
||||
mbuf[k++] = inb(tmport);
|
||||
tmport += 0x06;
|
||||
mbuf[k++] = inb(wkport + 0x19);
|
||||
goto phase_ins1;
|
||||
}
|
||||
if ((j & 0x80) == 0x00) {
|
||||
goto phase_ins1;
|
||||
}
|
||||
tmport -= 0x08;
|
||||
|
||||
while ((inb(tmport) & 0x80) == 0x00)
|
||||
while ((inb(wkport + 0x17) & 0x80) == 0x00)
|
||||
cpu_relax();
|
||||
|
||||
j = inb(tmport);
|
||||
j = inb(wkport + 0x17);
|
||||
if (j == 0x85) {
|
||||
goto tar_dcons;
|
||||
}
|
||||
|
|
@ -1674,20 +1586,15 @@ phase_ins1:
|
|||
}
|
||||
continue;
|
||||
phase_cmds:
|
||||
tmport = wkport + 0x10;
|
||||
outb(0x30, tmport);
|
||||
outb(0x30, wkport + 0x10);
|
||||
tar_dcons:
|
||||
tmport = wkport + 0x14;
|
||||
outb(0x00, tmport);
|
||||
tmport += 0x04;
|
||||
outb(0x08, tmport);
|
||||
tmport += 0x07;
|
||||
outb(0x00, wkport + 0x14);
|
||||
outb(0x08, wkport + 0x18);
|
||||
|
||||
while ((inb(tmport) & 0x80) == 0x00)
|
||||
while ((inb(wkport + 0x1f) & 0x80) == 0x00)
|
||||
cpu_relax();
|
||||
|
||||
tmport -= 0x08;
|
||||
j = inb(tmport);
|
||||
j = inb(wkport + 0x17);
|
||||
if (j != 0x16) {
|
||||
continue;
|
||||
}
|
||||
|
|
@ -1727,8 +1634,7 @@ tar_dcons:
|
|||
set_syn_ok:
|
||||
dev->id[0][i].devsp = (dev->id[0][i].devsp & 0x0f) | j;
|
||||
}
|
||||
tmport = wkport + 0x3a;
|
||||
outb((unsigned char) (inb(tmport) & 0xef), tmport);
|
||||
outb((unsigned char) (inb(wkport + 0x3a) & 0xef), wkport + 0x3a);
|
||||
}
|
||||
|
||||
static void is880(struct atp_unit *dev, unsigned int wkport)
|
||||
|
|
|
|||
Loading…
Reference in New Issue