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Some OMAP PRCM cleanup patches. These help prepare to convert the PRCM 

code into drivers.
 
 Basic build, boot, and PM test results are available here:
 
 http://www.pwsan.com/omap/testlogs/prcm-cleanup-v3.16/20140515213244/
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Merge tag 'for-v3.16/prcm-cleanup-a' of git://git.kernel.org/pub/scm/linux/kernel/git/pjw/omap-pending into omap-for-v3.16/prcm

Some OMAP PRCM cleanup patches.  These help prepare to convert the PRCM
code into drivers.

Basic build, boot, and PM test results are available here:

http://www.pwsan.com/omap/testlogs/prcm-cleanup-v3.16/20140515213244/

Conflicts:
	arch/arm/mach-omap2/cm3xxx.c
	arch/arm/mach-omap2/cm44xx.c

Also fixed up new section mismatch warnings.
This commit is contained in:
Tony Lindgren 2014-05-16 15:26:22 -07:00
parent be2d628448 70fcebf196
commit ea351c1603
21 changed files with 95 additions and 94 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-omap2/clockdomain.h
View File

@ -18,7 +18,6 @@
#include "powerdomain.h"
#include "clock.h"
#include "omap_hwmod.h"
/*
* Clockdomain flags
@ -98,6 +97,8 @@ struct clkdm_dep {
/* Possible flags for struct clockdomain._flags */
#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0)
struct omap_hwmod;
/**
* struct clockdomain - OMAP clockdomain
* @name: clockdomain name

15
arch/arm/mach-omap2/cm2xxx.c
View File

@ -18,9 +18,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "prm2xxx.h"
#include "cm.h"
#include "cm2xxx.h"
@ -390,7 +387,7 @@ void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core, u32 mdm)
tmp = omap2_cm_read_mod_reg(CORE_MOD, CM_CLKSEL1) &
OMAP24XX_CLKSEL_DSS2_MASK;
omap2_cm_write_mod_reg(core | tmp, CORE_MOD, CM_CLKSEL1);
if (cpu_is_omap2430())
if (mdm)
omap2_cm_write_mod_reg(mdm, OMAP2430_MDM_MOD, CM_CLKSEL);
}
@ -405,19 +402,11 @@ static struct cm_ll_data omap2xxx_cm_ll_data = {
int __init omap2xxx_cm_init(void)
{
if (!cpu_is_omap24xx())
return 0;
return cm_register(&omap2xxx_cm_ll_data);
}
static void __exit omap2xxx_cm_exit(void)
{
if (!cpu_is_omap24xx())
return;
/* Should never happen */
WARN(cm_unregister(&omap2xxx_cm_ll_data),
"%s: cm_ll_data function pointer mismatch\n", __func__);
cm_unregister(&omap2xxx_cm_ll_data);
}
__exitcall(omap2xxx_cm_exit);

3
arch/arm/mach-omap2/cm33xx.h
View File

@ -17,11 +17,8 @@
#ifndef __ARCH_ARM_MACH_OMAP2_CM_33XX_H
#define __ARCH_ARM_MACH_OMAP2_CM_33XX_H
#include "common.h"
#include "cm.h"
#include "cm-regbits-33xx.h"
#include "iomap.h"
/* CM base address */
#define AM33XX_CM_BASE 0x44e00000

25
arch/arm/mach-omap2/cm3xxx.c
View File

@ -18,9 +18,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include "soc.h"
#include "iomap.h"
#include "common.h"
#include "prm2xxx_3xxx.h"
#include "cm.h"
#include "cm3xxx.h"
@ -388,7 +385,8 @@ void omap3_cm_save_context(void)
omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL1);
cm_context.iva2_cm_clksel2 =
omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_CLKSEL2);
cm_context.cm_sysconfig = readl_relaxed(OMAP3430_CM_SYSCONFIG);
cm_context.cm_sysconfig =
omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_SYSCONFIG);
cm_context.sgx_cm_clksel =
omap2_cm_read_mod_reg(OMAP3430ES2_SGX_MOD, CM_CLKSEL);
cm_context.dss_cm_clksel =
@ -418,7 +416,8 @@ void omap3_cm_save_context(void)
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKSEL5);
cm_context.pll_cm_clken2 =
omap2_cm_read_mod_reg(PLL_MOD, OMAP3430ES2_CM_CLKEN2);
cm_context.cm_polctrl = readl_relaxed(OMAP3430_CM_POLCTRL);
cm_context.cm_polctrl =
omap2_cm_read_mod_reg(OCP_MOD, OMAP3430_CM_POLCTRL);
cm_context.iva2_cm_fclken =
omap2_cm_read_mod_reg(OMAP3430_IVA2_MOD, CM_FCLKEN);
cm_context.iva2_cm_clken_pll =
@ -519,7 +518,8 @@ void omap3_cm_restore_context(void)
CM_CLKSEL1);
omap2_cm_write_mod_reg(cm_context.iva2_cm_clksel2, OMAP3430_IVA2_MOD,
CM_CLKSEL2);
writel_relaxed(cm_context.cm_sysconfig, OMAP3430_CM_SYSCONFIG);
omap2_cm_write_mod_reg(cm_context.cm_sysconfig, OCP_MOD,
OMAP3430_CM_SYSCONFIG);
omap2_cm_write_mod_reg(cm_context.sgx_cm_clksel, OMAP3430ES2_SGX_MOD,
CM_CLKSEL);
omap2_cm_write_mod_reg(cm_context.dss_cm_clksel, OMAP3430_DSS_MOD,
@ -547,7 +547,8 @@ void omap3_cm_restore_context(void)
OMAP3430ES2_CM_CLKSEL5);
omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
OMAP3430ES2_CM_CLKEN2);
writel_relaxed(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
omap2_cm_write_mod_reg(cm_context.cm_polctrl, OCP_MOD,
OMAP3430_CM_POLCTRL);
omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
CM_FCLKEN);
omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
@ -669,19 +670,11 @@ static struct cm_ll_data omap3xxx_cm_ll_data = {
int __init omap3xxx_cm_init(void)
{
if (!cpu_is_omap34xx())
return 0;
return cm_register(&omap3xxx_cm_ll_data);
}
static void __exit omap3xxx_cm_exit(void)
{
if (!cpu_is_omap34xx())
return;
/* Should never happen */
WARN(cm_unregister(&omap3xxx_cm_ll_data),
"%s: cm_ll_data function pointer mismatch\n", __func__);
cm_unregister(&omap3xxx_cm_ll_data);
}
__exitcall(omap3xxx_cm_exit);

5
arch/arm/mach-omap2/cm3xxx.h
View File

@ -29,9 +29,8 @@
* These registers appear once per CM module.
*/
#define OMAP3430_CM_REVISION OMAP34XX_CM_REGADDR(OCP_MOD, 0x0000)
#define OMAP3430_CM_SYSCONFIG OMAP34XX_CM_REGADDR(OCP_MOD, 0x0010)
#define OMAP3430_CM_POLCTRL OMAP34XX_CM_REGADDR(OCP_MOD, 0x009c)
#define OMAP3430_CM_SYSCONFIG 0x0010
#define OMAP3430_CM_POLCTRL 0x009c
#define OMAP3_CM_CLKOUT_CTRL_OFFSET 0x0070
#define OMAP3430_CM_CLKOUT_CTRL OMAP_CM_REGADDR(OMAP3430_CCR_MOD, 0x0070)

11
arch/arm/mach-omap2/cm44xx.c
View File

@ -18,35 +18,32 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "cm.h"
#include "cm1_44xx.h"
#include "cm2_44xx.h"
#include "cm-regbits-44xx.h"
/* CM1 hardware module low-level functions */
/* Read a register in CM1 */
u32 omap4_cm1_read_inst_reg(s16 inst, u16 reg)
{
return readl_relaxed(OMAP44XX_CM1_REGADDR(inst, reg));
return readl_relaxed(cm_base + inst + reg);
}
/* Write into a register in CM1 */
void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 reg)
{
writel_relaxed(val, OMAP44XX_CM1_REGADDR(inst, reg));
writel_relaxed(val, cm_base + inst + reg);
}
/* Read a register in CM2 */
u32 omap4_cm2_read_inst_reg(s16 inst, u16 reg)
{
return readl_relaxed(OMAP44XX_CM2_REGADDR(inst, reg));
return readl_relaxed(cm2_base + inst + reg);
}
/* Write into a register in CM2 */
void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 reg)
{
writel_relaxed(val, OMAP44XX_CM2_REGADDR(inst, reg));
writel_relaxed(val, cm2_base + inst + reg);
}

2
arch/arm/mach-omap2/cm_common.c
View File

@ -14,11 +14,11 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/bug.h>
#include "cm2xxx.h"
#include "cm3xxx.h"
#include "cm44xx.h"
#include "common.h"
/*
* cm_ll_data: function pointers to SoC-specific implementations of

10
arch/arm/mach-omap2/cminst44xx.c
View File

@ -21,8 +21,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include "iomap.h"
#include "common.h"
#include "clockdomain.h"
#include "cm.h"
#include "cm1_44xx.h"
@ -30,12 +28,18 @@
#include "cm44xx.h"
#include "cminst44xx.h"
#include "cm-regbits-34xx.h"
#include "cm-regbits-44xx.h"
#include "prcm44xx.h"
#include "prm44xx.h"
#include "prcm_mpu44xx.h"
#include "prcm-common.h"
#define OMAP4430_IDLEST_SHIFT 16
#define OMAP4430_IDLEST_MASK (0x3 << 16)
#define OMAP4430_CLKTRCTRL_SHIFT 0
#define OMAP4430_CLKTRCTRL_MASK (0x3 << 0)
#define OMAP4430_MODULEMODE_SHIFT 0
#define OMAP4430_MODULEMODE_MASK (0x3 << 0)
/*
* CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield:
*

1
arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c
View File

@ -24,6 +24,7 @@
#include "prm33xx.h"
#include "omap_hwmod_33xx_43xx_common_data.h"
#include "prcm43xx.h"
#include "common.h"
#define CLKCTRL(oh, clkctrl) ((oh).prcm.omap4.clkctrl_offs = (clkctrl))
#define RSTCTRL(oh, rstctrl) ((oh).prcm.omap4.rstctrl_offs = (rstctrl))

1
arch/arm/mach-omap2/powerdomain-common.c
View File

@ -17,7 +17,6 @@
#include "pm.h"
#include "cm.h"
#include "cm-regbits-34xx.h"
#include "cm-regbits-44xx.h"
#include "prm-regbits-34xx.h"
#include "prm-regbits-44xx.h"

1
arch/arm/mach-omap2/powerdomain.c
View File

@ -32,6 +32,7 @@
#include "powerdomain.h"
#include "clockdomain.h"
#include "voltage.h"
#include "soc.h"
#include "pm.h"

3
arch/arm/mach-omap2/powerdomain.h
View File

@ -21,8 +21,6 @@
#include <linux/list.h>
#include <linux/spinlock.h>
#include "voltage.h"
/* Powerdomain basic power states */
#define PWRDM_POWER_OFF 0x0
#define PWRDM_POWER_RET 0x1
@ -75,6 +73,7 @@
struct clockdomain;
struct powerdomain;
struct voltagedomain;
/**
* struct powerdomain - OMAP powerdomain

24
arch/arm/mach-omap2/prcm-common.h
View File

@ -428,6 +428,28 @@
#define MAX_IOPAD_LATCH_TIME 100
# ifndef __ASSEMBLER__
#include <linux/delay.h>
/**
* omap_test_timeout - busy-loop, testing a condition
* @cond: condition to test until it evaluates to true
* @timeout: maximum number of microseconds in the timeout
* @index: loop index (integer)
*
* Loop waiting for @cond to become true or until at least @timeout
* microseconds have passed. To use, define some integer @index in the
* calling code. After running, if @index == @timeout, then the loop has
* timed out.
*/
#define omap_test_timeout(cond, timeout, index) \
({ \
for (index = 0; index < timeout; index++) { \
if (cond) \
break; \
udelay(1); \
} \
})
/**
* struct omap_prcm_irq - describes a PRCM interrupt bit
* @name: a short name describing the interrupt type, e.g. "wkup" or "io"
@ -458,6 +480,7 @@ struct omap_prcm_irq {
* @ocp_barrier: fn ptr to force buffered PRM writes to complete
* @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
* @restore_irqen: fn ptr to save and clear IRQENABLE regs
* @reconfigure_io_chain: fn ptr to reconfigure IO chain
* @saved_mask: IRQENABLE regs are saved here during suspend
* @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
* @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
@ -479,6 +502,7 @@ struct omap_prcm_irq_setup {
void (*ocp_barrier)(void);
void (*save_and_clear_irqen)(u32 *saved_mask);
void (*restore_irqen)(u32 *saved_mask);
void (*reconfigure_io_chain)(void);
u32 *saved_mask;
u32 *priority_mask;
int base_irq;

1
arch/arm/mach-omap2/prcm_mpu44xx.h
View File

@ -26,7 +26,6 @@
#define __ARCH_ARM_MACH_OMAP2_PRCM_MPU44XX_H
#include "prcm_mpu_44xx_54xx.h"
#include "common.h"
#define OMAP4430_PRCM_MPU_BASE 0x48243000

10
arch/arm/mach-omap2/prm.h
View File

@ -17,10 +17,18 @@
# ifndef __ASSEMBLER__
extern void __iomem *prm_base;
extern u16 prm_features;
extern void omap2_set_globals_prm(void __iomem *prm);
int of_prcm_init(void);
# endif
/*
* prm_features flag values
*
* PRM_HAS_IO_WAKEUP: has IO wakeup capability
* PRM_HAS_VOLTAGE: has voltage domains
*/
#define PRM_HAS_IO_WAKEUP (1 << 0)
/*
* MAX_MODULE_SOFTRESET_WAIT: Maximum microseconds to wait for OMAP
@ -118,6 +126,7 @@ struct prm_reset_src_map {
* @read_reset_sources: ptr to the SoC PRM-specific get_reset_source impl
* @was_any_context_lost_old: ptr to the SoC PRM context loss test fn
* @clear_context_loss_flags_old: ptr to the SoC PRM context loss flag clear fn
* @late_init: ptr to the late init function
*
* XXX @was_any_context_lost_old and @clear_context_loss_flags_old are
* deprecated.
@ -126,6 +135,7 @@ struct prm_ll_data {
u32 (*read_reset_sources)(void);
bool (*was_any_context_lost_old)(u8 part, s16 inst, u16 idx);
void (*clear_context_loss_flags_old)(u8 part, s16 inst, u16 idx);
int (*late_init)(void);
};
extern int prm_register(struct prm_ll_data *pld);

13
arch/arm/mach-omap2/prm2xxx.c
View File

@ -18,9 +18,6 @@
#include <linux/io.h>
#include <linux/irq.h>
#include "soc.h"
#include "common.h"
#include "vp.h"
#include "powerdomain.h"
#include "clockdomain.h"
#include "prm2xxx.h"
@ -201,19 +198,11 @@ static struct prm_ll_data omap2xxx_prm_ll_data = {
int __init omap2xxx_prm_init(void)
{
if (!cpu_is_omap24xx())
return 0;
return prm_register(&omap2xxx_prm_ll_data);
}
static void __exit omap2xxx_prm_exit(void)
{
if (!cpu_is_omap24xx())
return;
/* Should never happen */
WARN(prm_unregister(&omap2xxx_prm_ll_data),
"%s: prm_ll_data function pointer mismatch\n", __func__);
prm_unregister(&omap2xxx_prm_ll_data);
}
__exitcall(omap2xxx_prm_exit);

1
arch/arm/mach-omap2/prm2xxx_3xxx.c
View File

@ -16,7 +16,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include "common.h"
#include "powerdomain.h"
#include "prm2xxx_3xxx.h"
#include "prm-regbits-24xx.h"

1
arch/arm/mach-omap2/prm33xx.c
View File

@ -19,7 +19,6 @@
#include <linux/err.h>
#include <linux/io.h>
#include "common.h"
#include "powerdomain.h"
#include "prm33xx.h"
#include "prm-regbits-33xx.h"

22
arch/arm/mach-omap2/prm3xxx.c
View File

@ -43,6 +43,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
.ocp_barrier = &omap3xxx_prm_ocp_barrier,
.save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen,
.restore_irqen = &omap3xxx_prm_restore_irqen,
.reconfigure_io_chain = &omap3xxx_prm_reconfigure_io_chain,
};
/*
@ -246,7 +247,7 @@ void omap3xxx_prm_reconfigure_io_chain(void)
*/
static void __init omap3xxx_prm_enable_io_wakeup(void)
{
if (omap3_has_io_wakeup())
if (prm_features & PRM_HAS_IO_WAKEUP)
omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
PM_WKEN);
}
@ -400,23 +401,26 @@ struct pwrdm_ops omap3_pwrdm_operations = {
*
*/
static int omap3xxx_prm_late_init(void);
static struct prm_ll_data omap3xxx_prm_ll_data = {
.read_reset_sources = &omap3xxx_prm_read_reset_sources,
.late_init = &omap3xxx_prm_late_init,
};
int __init omap3xxx_prm_init(void)
{
if (!cpu_is_omap34xx())
return 0;
if (omap3_has_io_wakeup())
prm_features |= PRM_HAS_IO_WAKEUP;
return prm_register(&omap3xxx_prm_ll_data);
}
static int __init omap3xxx_prm_late_init(void)
static int omap3xxx_prm_late_init(void)
{
int ret;
if (!cpu_is_omap34xx())
if (!(prm_features & PRM_HAS_IO_WAKEUP))
return 0;
omap3xxx_prm_enable_io_wakeup();
@ -427,15 +431,9 @@ static int __init omap3xxx_prm_late_init(void)
return ret;
}
omap_subsys_initcall(omap3xxx_prm_late_init);
static void __exit omap3xxx_prm_exit(void)
{
if (!cpu_is_omap34xx())
return;
/* Should never happen */
WARN(prm_unregister(&omap3xxx_prm_ll_data),
"%s: prm_ll_data function pointer mismatch\n", __func__);
prm_unregister(&omap3xxx_prm_ll_data);
}
__exitcall(omap3xxx_prm_exit);

20
arch/arm/mach-omap2/prm44xx.c
View File

@ -47,6 +47,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
.ocp_barrier = &omap44xx_prm_ocp_barrier,
.save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
.restore_irqen = &omap44xx_prm_restore_irqen,
.reconfigure_io_chain = &omap44xx_prm_reconfigure_io_chain,
};
/*
@ -649,6 +650,8 @@ struct pwrdm_ops omap4_pwrdm_operations = {
.pwrdm_has_voltdm = omap4_check_vcvp,
};
static int omap44xx_prm_late_init(void);
/*
* XXX document
*/
@ -656,34 +659,29 @@ static struct prm_ll_data omap44xx_prm_ll_data = {
.read_reset_sources = &omap44xx_prm_read_reset_sources,
.was_any_context_lost_old = &omap44xx_prm_was_any_context_lost_old,
.clear_context_loss_flags_old = &omap44xx_prm_clear_context_loss_flags_old,
.late_init = &omap44xx_prm_late_init,
};
int __init omap44xx_prm_init(void)
{
if (!cpu_is_omap44xx() && !soc_is_omap54xx() && !soc_is_dra7xx())
return 0;
if (cpu_is_omap44xx())
prm_features |= PRM_HAS_IO_WAKEUP;
return prm_register(&omap44xx_prm_ll_data);
}
static int __init omap44xx_prm_late_init(void)
static int omap44xx_prm_late_init(void)
{
if (!cpu_is_omap44xx())
if (!(prm_features & PRM_HAS_IO_WAKEUP))
return 0;
omap44xx_prm_enable_io_wakeup();
return omap_prcm_register_chain_handler(&omap4_prcm_irq_setup);
}
omap_subsys_initcall(omap44xx_prm_late_init);
static void __exit omap44xx_prm_exit(void)
{
if (!cpu_is_omap44xx())
return;
/* Should never happen */
WARN(prm_unregister(&omap44xx_prm_ll_data),
"%s: prm_ll_data function pointer mismatch\n", __func__);
prm_unregister(&omap44xx_prm_ll_data);
}
__exitcall(omap44xx_prm_exit);

17
arch/arm/mach-omap2/prm_common.c
View File

@ -62,6 +62,8 @@ static struct omap_prcm_irq_setup *prcm_irq_setup;
/* prm_base: base virtual address of the PRM IP block */
void __iomem *prm_base;
u16 prm_features;
/*
* prm_ll_data: function pointers to SoC-specific implementations of
* common PRM functions
@ -330,12 +332,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
if (of_have_populated_dt()) {
int irq = omap_prcm_event_to_irq("io");
if (cpu_is_omap34xx())
omap_pcs_legacy_init(irq,
omap3xxx_prm_reconfigure_io_chain);
else
omap_pcs_legacy_init(irq,
omap44xx_prm_reconfigure_io_chain);
omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
}
return 0;
@ -530,3 +527,11 @@ int __init of_prcm_init(void)
return 0;
}
static int __init prm_late_init(void)
{
if (prm_ll_data->late_init)
return prm_ll_data->late_init();
return 0;
}
subsys_initcall(prm_late_init);