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hpt366: cleanup maskproc() method 

Since the maskproc() method calls either mirror the interrupt en/disable via
the nIEN bit of the device control register done by the IDE core before issuing
a command or unmask the interrupt after a command executed in polled mode (when
interrupt is already not expected), it is pointless to manipulate the nIEN bit
in this method; therefore, just do nothing for the drives not on the quirk list.
Move the code to the left by using an early return and the 'else if' construct,
while at it....

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
[bart: fix checkpatch.pl warning]
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
Sergei Shtylyov 2008-10-17 18:09:15 +02:00 committed by Bartlomiej Zolnierkiewicz
parent e5403bff8a
commit ea2ac5a3b7
1 changed files with 15 additions and 17 deletions
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32
drivers/ide/pci/hpt366.c
View File

@ -3,7 +3,7 @@
* Portions Copyright (C) 2001 Sun Microsystems, Inc.
* Portions Copyright (C) 2003 Red Hat Inc
* Portions Copyright (C) 2007 Bartlomiej Zolnierkiewicz
* Portions Copyright (C) 2005-2007 MontaVista Software, Inc.
* Portions Copyright (C) 2005-2008 MontaVista Software, Inc.
*
* Thanks to HighPoint Technologies for their assistance, and hardware.
* Special Thanks to Jon Burchmore in SanDiego for the deep pockets, his
@ -748,26 +748,24 @@ static void hpt3xx_maskproc(ide_drive_t *drive, int mask)
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct hpt_info *info = hpt3xx_get_info(hwif->dev);
if (drive->quirk_list) {
if (info->chip_type >= HPT370) {
u8 scr1 = 0;
if (drive->quirk_list == 0)
return;
pci_read_config_byte(dev, 0x5a, &scr1);
if (((scr1 & 0x10) >> 4) != mask) {
if (mask)
scr1 |= 0x10;
else
scr1 &= ~0x10;
pci_write_config_byte(dev, 0x5a, scr1);
}
} else {
if (info->chip_type >= HPT370) {
u8 scr1 = 0;
pci_read_config_byte(dev, 0x5a, &scr1);
if (((scr1 & 0x10) >> 4) != mask) {
if (mask)
disable_irq(hwif->irq);
scr1 |= 0x10;
else
enable_irq (hwif->irq);
scr1 &= ~0x10;
pci_write_config_byte(dev, 0x5a, scr1);
}
} else
outb(ATA_DEVCTL_OBS | (mask ? 2 : 0), hwif->io_ports.ctl_addr);
} else if (mask)
disable_irq(hwif->irq);
else
enable_irq(hwif->irq);
}
/*