ARM: SoC fixes
I didn't get a batch in this weekend, so here's what we queued up last week and today. - A couple of defconfigs add back debugfs -- it used to be implicitly enabled through CONFIG_TRACING, but0e4a459f56
("tracing: Remove unnecessary DEBUG_FS dependency") removed that. - The rest are mostly minor fixlets of the usual kind; some DT tweaks, a headerfile refactor that needs a build fix now, etc. -----BEGIN PGP SIGNATURE----- iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl33/BcPHG9sb2ZAbGl4 b20ubmV0AAoJEIwa5zzehBx3DtAP+wWlWswNVYUypZp5qhsTQ9cezsACbR+kh7WD qpEFxylLxqI1MqKnbZ7CTOKWQHPiqA5hMnuK1gBpzOvXTK+akYa0VtdG1ETRkJni L9QXjWq7ax1J68yAeKgIff6WWBBKr98C+HZ3uK/3jdat1xKLHUXrH6T/cgUjG0jm JtomFEIVtMb/RdW3rbfxA4IfmrxfCAs4fQQwc9xkc23dEeF3Y9oSxsRxRT9C7J4I ZnqvWTWaWN77y/4V4hUMhdPwGI4hH8fv71DFEgP+9LqG3OVQvKfc+H5UrR0KUjEY qk8bAD1jcLbkICpazeQDozAbdTt1NBSt+4zBm4gZA9vZc78Tk3mbJ4+m5JlZNt4h PQf8r6n8GYZ266mr6k5rPZ/kNv4dxL59HIkZL1EER8vUvZykEl1nztjw4PMt0xX1 xK7xfx9p6YN/jKDcwTTCuSzMd8d3YWqbuXzpbTbZCe4dsDiwfsSMaskIGRU7bx2U LvGZ0uVc8x7m7lV2NHvOVVzBg/i7H7l3Xq7Qq7doHExqmenFWcjG0YKiMeGUOE3X sCvHH0ip45x3vxiYzRRnUWmNyrcHnR1M2X3UwqXt9GHLgJ2vD+jS32cve2x643XN tby+szKimDbyeqxPDfWkUV0K1if66PFt3Czr0erFHYadS3o47v23pHjhsl+fIcY6 2xx8hH8O =cr5E -----END PGP SIGNATURE----- Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "I didn't get a batch in this weekend, so here's what we queued up last week and today. - A couple of defconfigs add back debugfs -- it used to be implicitly enabled through CONFIG_TRACING, but0e4a459f56
("tracing: Remove unnecessary DEBUG_FS dependency") removed that. - The rest are mostly minor fixlets of the usual kind; some DT tweaks, a headerfile refactor that needs a build fix now, etc" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (30 commits) ARM: bcm: Add missing sentinel to bcm2711_compat[] ARM: shmobile: defconfig: Restore debugfs support bus: ti-sysc: Fix missing reset delay handling ARM: imx: Fix boot crash if ocotp is not found ARM: imx_v6_v7_defconfig: Explicitly restore CONFIG_DEBUG_FS ARM: dts: imx6ul-evk: Fix peripheral regulator arm64: dts: ls1028a: fix reboot node ARM: mmp: include the correct cputype.h ARM: dts: am437x-gp/epos-evm: fix panel compatible arm64: dts: ls1028a: fix typo in TMU calibration data ARM: imx: Correct ocotp id for serial number support of i.MX6ULL/ULZ SoCs ARM: dts: bcm283x: Fix critical trip point ARM: omap2plus_defconfig: Add back DEBUG_FS ARM: omap2plus_defconfig: enable NET_SWITCHDEV ARM: dts: am335x-sancloud-bbe: fix phy mode bus: ti-sysc: Fix missing force mstandby quirk handling reset: Do not register resource data for missing resets reset: Fix {of,devm}_reset_control_array_get kerneldoc return types reset: brcmstb: Remove resource checks dt-bindings: reset: Fix brcmstb-reset example ...
This commit is contained in:
commit
ea200dec51
1
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@ -152,6 +152,7 @@ Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
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Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
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Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
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Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
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Lukasz Luba <lukasz.luba@arm.com> <l.luba@partner.samsung.com>
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Maciej W. Rozycki <macro@mips.com> <macro@imgtec.com>
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Marc Zyngier <maz@kernel.org> <marc.zyngier@arm.com>
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Marcin Nowakowski <marcin.nowakowski@mips.com> <marcin.nowakowski@imgtec.com>
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@ -22,6 +22,6 @@ Example:
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};
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ðernet_switch {
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resets = <&reset>;
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resets = <&reset 26>;
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reset-names = "switch";
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};
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@ -2272,6 +2272,7 @@ F: drivers/*/*s3c64xx*
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F: drivers/*/*s5pv210*
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F: drivers/memory/samsung/
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F: drivers/soc/samsung/
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F: drivers/tty/serial/samsung*
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F: include/linux/soc/samsung/
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F: Documentation/arm/samsung/
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F: Documentation/devicetree/bindings/arm/samsung/
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@ -5000,7 +5001,7 @@ F: include/linux/dma-mapping.h
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F: include/linux/dma-noncoherent.h
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DMC FREQUENCY DRIVER FOR SAMSUNG EXYNOS5422
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M: Lukasz Luba <l.luba@partner.samsung.com>
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M: Lukasz Luba <lukasz.luba@arm.com>
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L: linux-pm@vger.kernel.org
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L: linux-samsung-soc@vger.kernel.org
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S: Maintained
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@ -108,7 +108,7 @@
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&cpsw_emac0 {
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phy-handle = <ðphy0>;
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phy-mode = "rgmii-txid";
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phy-mode = "rgmii-id";
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};
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&i2c0 {
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@ -86,7 +86,7 @@
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};
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lcd0: display {
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compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
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compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
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label = "lcd";
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backlight = <&lcd_bl>;
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@ -42,7 +42,7 @@
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};
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lcd0: display {
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compatible = "osddisplays,osd057T0559-34ts", "panel-dpi";
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compatible = "osddisplays,osd070t1718-19ts", "panel-dpi";
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label = "lcd";
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backlight = <&lcd_bl>;
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@ -174,8 +174,8 @@
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mdio: mdio@18002000 {
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compatible = "brcm,iproc-mdio";
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reg = <0x18002000 0x8>;
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#size-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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#address-cells = <1>;
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status = "disabled";
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gphy0: ethernet-phy@0 {
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@ -43,7 +43,7 @@
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<0x7c000000 0x0 0xfc000000 0x02000000>,
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<0x40000000 0x0 0xff800000 0x00800000>;
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/* Emulate a contiguous 30-bit address range for DMA */
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dma-ranges = <0xc0000000 0x0 0x00000000 0x3c000000>;
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dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>;
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/*
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* This node is the provider for the enable-method for
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@ -37,7 +37,7 @@
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trips {
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cpu-crit {
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temperature = <80000>;
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temperature = <90000>;
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hysteresis = <0>;
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type = "critical";
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};
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@ -353,8 +353,8 @@
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mdio: mdio@18003000 {
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compatible = "brcm,iproc-mdio";
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reg = <0x18003000 0x8>;
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#size-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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#address-cells = <1>;
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};
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mdio-bus-mux@18003000 {
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|
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|
@ -265,11 +265,6 @@
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regulator-name = "LDORTC1";
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regulator-boot-on;
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};
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||||
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ldortc2_reg: LDORTC2 {
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regulator-name = "LDORTC2";
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regulator-boot-on;
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};
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};
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};
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};
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|
|
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@ -30,14 +30,26 @@
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enable-active-high;
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};
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reg_sensors: regulator-sensors {
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reg_peri_3v3: regulator-peri-3v3 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sensors_reg>;
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regulator-name = "sensors-supply";
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pinctrl-0 = <&pinctrl_peri_3v3>;
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regulator-name = "VPERI_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 2 GPIO_ACTIVE_LOW>;
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/*
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* If you want to want to make this dynamic please
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* check schematics and test all affected peripherals:
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*
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* - sensors
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* - ethernet phy
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* - can
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* - bluetooth
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* - wm8960 audio codec
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* - ov5640 camera
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*/
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regulator-always-on;
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};
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reg_can_3v3: regulator-can-3v3 {
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|
@ -140,6 +152,7 @@
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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phy-supply = <®_peri_3v3>;
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status = "okay";
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};
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|
@ -148,6 +161,7 @@
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pinctrl-0 = <&pinctrl_enet2>;
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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phy-supply = <®_peri_3v3>;
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status = "okay";
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mdio {
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|
@ -193,8 +207,8 @@
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magnetometer@e {
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compatible = "fsl,mag3110";
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reg = <0x0e>;
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vdd-supply = <®_sensors>;
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vddio-supply = <®_sensors>;
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vdd-supply = <®_peri_3v3>;
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vddio-supply = <®_peri_3v3>;
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};
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};
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@ -227,7 +241,7 @@
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flash0: n25q256a@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "micron,n25q256a";
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compatible = "micron,n25q256a", "jedec,spi-nor";
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spi-max-frequency = <29000000>;
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spi-rx-bus-width = <4>;
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spi-tx-bus-width = <4>;
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|
@ -462,7 +476,7 @@
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>;
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};
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pinctrl_sensors_reg: sensorsreggrp {
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pinctrl_peri_3v3: peri3v3grp {
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fsl,pins = <
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MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0
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>;
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|
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|
@ -350,6 +350,7 @@ CONFIG_PRINTK_TIME=y
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CONFIG_DYNAMIC_DEBUG=y
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CONFIG_DEBUG_INFO=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_FS=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_SOFTLOCKUP_DETECTOR=y
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# CONFIG_DETECT_HUNG_TASK is not set
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@ -462,6 +462,7 @@ CONFIG_FONT_8x8=y
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CONFIG_FONT_8x16=y
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CONFIG_PRINTK_TIME=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_FS=y
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# CONFIG_SCHED_DEBUG is not set
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CONFIG_PROVE_LOCKING=y
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# CONFIG_DEBUG_BUGVERBOSE is not set
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|
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@ -92,6 +92,7 @@ CONFIG_IP_PNP_BOOTP=y
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CONFIG_IP_PNP_RARP=y
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CONFIG_NETFILTER=y
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CONFIG_PHONET=m
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CONFIG_NET_SWITCHDEV=y
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CONFIG_CAN=m
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CONFIG_CAN_C_CAN=m
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CONFIG_CAN_C_CAN_PLATFORM=m
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@ -181,6 +182,7 @@ CONFIG_SMSC911X=y
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# CONFIG_NET_VENDOR_STMICRO is not set
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CONFIG_TI_DAVINCI_EMAC=y
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CONFIG_TI_CPSW=y
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CONFIG_TI_CPSW_SWITCHDEV=y
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CONFIG_TI_CPTS=y
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# CONFIG_NET_VENDOR_VIA is not set
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# CONFIG_NET_VENDOR_WIZNET is not set
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@ -554,6 +556,6 @@ CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_INFO_SPLIT=y
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CONFIG_DEBUG_INFO_DWARF4=y
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CONFIG_MAGIC_SYSRQ=y
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CONFIG_DEBUG_FS=y
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CONFIG_SCHEDSTATS=y
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# CONFIG_DEBUG_BUGVERBOSE is not set
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CONFIG_TI_CPSW_SWITCHDEV=y
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|
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@ -212,4 +212,5 @@ CONFIG_DMA_CMA=y
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CONFIG_CMA_SIZE_MBYTES=64
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CONFIG_PRINTK_TIME=y
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# CONFIG_ENABLE_MUST_CHECK is not set
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CONFIG_DEBUG_FS=y
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CONFIG_DEBUG_KERNEL=y
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@ -13,6 +13,7 @@ static const char * const bcm2711_compat[] = {
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#ifdef CONFIG_ARCH_MULTI_V7
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"brcm,bcm2711",
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#endif
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NULL
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};
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||||
DT_MACHINE_START(BCM2711, "BCM2711")
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|
|
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@ -84,7 +84,7 @@ struct device * __init imx_soc_device_init(void)
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const char *ocotp_compat = NULL;
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struct soc_device *soc_dev;
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struct device_node *root;
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||||
struct regmap *ocotp;
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struct regmap *ocotp = NULL;
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||||
const char *soc_id;
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u64 soc_uid = 0;
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u32 val;
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||||
|
@ -148,11 +148,11 @@ struct device * __init imx_soc_device_init(void)
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soc_id = "i.MX6UL";
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break;
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||||
case MXC_CPU_IMX6ULL:
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ocotp_compat = "fsl,imx6ul-ocotp";
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||||
ocotp_compat = "fsl,imx6ull-ocotp";
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||||
soc_id = "i.MX6ULL";
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||||
break;
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||||
case MXC_CPU_IMX6ULZ:
|
||||
ocotp_compat = "fsl,imx6ul-ocotp";
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||||
ocotp_compat = "fsl,imx6ull-ocotp";
|
||||
soc_id = "i.MX6ULZ";
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||||
break;
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||||
case MXC_CPU_IMX6SLL:
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||||
|
@ -175,7 +175,9 @@ struct device * __init imx_soc_device_init(void)
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|||
ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat);
|
||||
if (IS_ERR(ocotp))
|
||||
pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat);
|
||||
}
|
||||
|
||||
if (!IS_ERR_OR_NULL(ocotp)) {
|
||||
regmap_read(ocotp, OCOTP_UID_H, &val);
|
||||
soc_uid = val;
|
||||
regmap_read(ocotp, OCOTP_UID_L, &val);
|
||||
|
|
|
@ -17,9 +17,9 @@ extern void pxa168_clear_keypad_wakeup(void);
|
|||
#include <linux/platform_data/keypad-pxa27x.h>
|
||||
#include <linux/pxa168_eth.h>
|
||||
#include <linux/platform_data/mv_usb.h>
|
||||
#include <linux/soc/mmp/cputype.h>
|
||||
|
||||
#include "devices.h"
|
||||
#include "cputype.h"
|
||||
|
||||
extern struct pxa_device_desc pxa168_device_uart1;
|
||||
extern struct pxa_device_desc pxa168_device_uart2;
|
||||
|
|
|
@ -551,8 +551,9 @@ static struct clk *ve_spc_clk_register(struct device *cpu_dev)
|
|||
|
||||
static int __init ve_spc_clk_init(void)
|
||||
{
|
||||
int cpu;
|
||||
int cpu, cluster;
|
||||
struct clk *clk;
|
||||
bool init_opp_table[MAX_CLUSTERS] = { false };
|
||||
|
||||
if (!info)
|
||||
return 0; /* Continue only if SPC is initialised */
|
||||
|
@ -578,8 +579,17 @@ static int __init ve_spc_clk_init(void)
|
|||
continue;
|
||||
}
|
||||
|
||||
cluster = topology_physical_package_id(cpu_dev->id);
|
||||
if (init_opp_table[cluster])
|
||||
continue;
|
||||
|
||||
if (ve_init_opp_table(cpu_dev))
|
||||
pr_warn("failed to initialise cpu%d opp table\n", cpu);
|
||||
else if (dev_pm_opp_set_sharing_cpus(cpu_dev,
|
||||
topology_core_cpumask(cpu_dev->id)))
|
||||
pr_warn("failed to mark OPPs shared for cpu%d\n", cpu);
|
||||
else
|
||||
init_opp_table[cluster] = true;
|
||||
}
|
||||
|
||||
platform_device_register_simple("vexpress-spc-cpufreq", -1, NULL, 0);
|
||||
|
|
|
@ -88,7 +88,7 @@
|
|||
|
||||
reboot {
|
||||
compatible ="syscon-reboot";
|
||||
regmap = <&dcfg>;
|
||||
regmap = <&rst>;
|
||||
offset = <0xb0>;
|
||||
mask = <0x02>;
|
||||
};
|
||||
|
@ -178,6 +178,12 @@
|
|||
big-endian;
|
||||
};
|
||||
|
||||
rst: syscon@1e60000 {
|
||||
compatible = "syscon";
|
||||
reg = <0x0 0x1e60000 0x0 0x10000>;
|
||||
little-endian;
|
||||
};
|
||||
|
||||
scfg: syscon@1fc0000 {
|
||||
compatible = "fsl,ls1028a-scfg", "syscon";
|
||||
reg = <0x0 0x1fc0000 0x0 0x10000>;
|
||||
|
@ -584,7 +590,7 @@
|
|||
0x00010004 0x0000003d
|
||||
0x00010005 0x00000045
|
||||
0x00010006 0x0000004d
|
||||
0x00010007 0x00000045
|
||||
0x00010007 0x00000055
|
||||
0x00010008 0x0000005e
|
||||
0x00010009 0x00000066
|
||||
0x0001000a 0x0000006e
|
||||
|
|
|
@ -981,7 +981,8 @@ static int sysc_disable_module(struct device *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
if (ddata->cfg.quirks & SYSC_QUIRK_SWSUP_MSTANDBY)
|
||||
if (ddata->cfg.quirks & (SYSC_QUIRK_SWSUP_MSTANDBY) ||
|
||||
ddata->cfg.quirks & (SYSC_QUIRK_FORCE_MSTANDBY))
|
||||
best_mode = SYSC_IDLE_FORCE;
|
||||
|
||||
reg &= ~(SYSC_IDLE_MASK << regbits->midle_shift);
|
||||
|
@ -1583,6 +1584,10 @@ static int sysc_reset(struct sysc *ddata)
|
|||
sysc_val |= sysc_mask;
|
||||
sysc_write(ddata, sysc_offset, sysc_val);
|
||||
|
||||
if (ddata->cfg.srst_udelay)
|
||||
usleep_range(ddata->cfg.srst_udelay,
|
||||
ddata->cfg.srst_udelay * 2);
|
||||
|
||||
if (ddata->clk_enable_quirk)
|
||||
ddata->clk_enable_quirk(ddata);
|
||||
|
||||
|
|
|
@ -434,7 +434,7 @@ static int ve_spc_cpufreq_init(struct cpufreq_policy *policy)
|
|||
if (cur_cluster < MAX_CLUSTERS) {
|
||||
int cpu;
|
||||
|
||||
cpumask_copy(policy->cpus, topology_core_cpumask(policy->cpu));
|
||||
dev_pm_opp_get_sharing_cpus(cpu_dev, policy->cpus);
|
||||
|
||||
for_each_cpu(cpu, policy->cpus)
|
||||
per_cpu(physical_cluster, cpu) = cur_cluster;
|
||||
|
|
|
@ -787,7 +787,7 @@ struct reset_control *__devm_reset_control_get(struct device *dev,
|
|||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
rstc = __reset_control_get(dev, id, index, shared, optional, acquired);
|
||||
if (!IS_ERR(rstc)) {
|
||||
if (!IS_ERR_OR_NULL(rstc)) {
|
||||
*ptr = rstc;
|
||||
devres_add(dev, ptr);
|
||||
} else {
|
||||
|
@ -861,8 +861,7 @@ static int of_reset_control_get_count(struct device_node *node)
|
|||
* @acquired: only one reset control may be acquired for a given controller
|
||||
* and ID
|
||||
*
|
||||
* Returns pointer to allocated reset_control_array on success or
|
||||
* error on failure
|
||||
* Returns pointer to allocated reset_control on success or error on failure
|
||||
*/
|
||||
struct reset_control *
|
||||
of_reset_control_array_get(struct device_node *np, bool shared, bool optional,
|
||||
|
@ -915,8 +914,7 @@ EXPORT_SYMBOL_GPL(of_reset_control_array_get);
|
|||
* that just have to be asserted or deasserted, without any
|
||||
* requirements on the order.
|
||||
*
|
||||
* Returns pointer to allocated reset_control_array on success or
|
||||
* error on failure
|
||||
* Returns pointer to allocated reset_control on success or error on failure
|
||||
*/
|
||||
struct reset_control *
|
||||
devm_reset_control_array_get(struct device *dev, bool shared, bool optional)
|
||||
|
@ -930,7 +928,7 @@ devm_reset_control_array_get(struct device *dev, bool shared, bool optional)
|
|||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
rstc = of_reset_control_array_get(dev->of_node, shared, optional, true);
|
||||
if (IS_ERR(rstc)) {
|
||||
if (IS_ERR_OR_NULL(rstc)) {
|
||||
devres_free(devres);
|
||||
return rstc;
|
||||
}
|
||||
|
|
|
@ -91,12 +91,6 @@ static int brcmstb_reset_probe(struct platform_device *pdev)
|
|||
return -ENOMEM;
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!IS_ALIGNED(res->start, SW_INIT_BANK_SIZE) ||
|
||||
!IS_ALIGNED(resource_size(res), SW_INIT_BANK_SIZE)) {
|
||||
dev_err(kdev, "incorrect register range\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
priv->base = devm_ioremap_resource(kdev, res);
|
||||
if (IS_ERR(priv->base))
|
||||
return PTR_ERR(priv->base);
|
||||
|
|
|
@ -49,6 +49,7 @@ struct sysc_regbits {
|
|||
s8 emufree_shift;
|
||||
};
|
||||
|
||||
#define SYSC_QUIRK_FORCE_MSTANDBY BIT(20)
|
||||
#define SYSC_MODULE_QUIRK_AESS BIT(19)
|
||||
#define SYSC_MODULE_QUIRK_SGX BIT(18)
|
||||
#define SYSC_MODULE_QUIRK_HDQ1W BIT(17)
|
||||
|
|
Loading…
Reference in New Issue