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OpenCloudOS-Kernel
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Merge branches 'features/assorted', 'features/imx-cpurev', 'features/imx-pata', 'features/multisoc' and 'features/mxs' into imx-features-for-arnd

This commit is contained in:
Sascha Hauer 2011-08-26 10:10:12 +02:00
parent 91dcc7f437 c52c983551 d5534ba6c7 f32609c5a0 87d022cc49
commit e93aabb552
48 changed files with 607 additions and 464 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/Makefile
View File

@ -154,9 +154,7 @@ machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx
machine-$(CONFIG_ARCH_MMP) := mmp
machine-$(CONFIG_ARCH_MSM) := msm
machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0
machine-$(CONFIG_ARCH_MX1) := imx
machine-$(CONFIG_ARCH_MX2) := imx
machine-$(CONFIG_ARCH_MX25) := imx
machine-$(CONFIG_ARCH_IMX_V4_V5) := imx
machine-$(CONFIG_ARCH_MX3) := imx
machine-$(CONFIG_ARCH_MX5) := mx5
machine-$(CONFIG_ARCH_MXS) := mxs

68
arch/arm/configs/mx27_defconfig → arch/arm/configs/imx_v4_v5_defconfig
View File

@ -3,9 +3,7 @@ CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_EXTRA_PASS=y
# CONFIG_COMPAT_BRK is not set
CONFIG_SLAB=y
CONFIG_PROFILING=y
@ -17,8 +15,12 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MX2=y
CONFIG_MACH_MX27=y
CONFIG_ARCH_IMX_V4_V5=y
CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y
CONFIG_MACH_MX21ADS=y
CONFIG_MACH_MX25_3DS=y
CONFIG_MACH_EUKREA_CPUIMX25=y
CONFIG_MACH_MX27ADS=y
CONFIG_MACH_PCM038=y
CONFIG_MACH_CPUIMX27=y
@ -29,6 +31,7 @@ CONFIG_MACH_IMX27_VISSTRIM_M10=y
CONFIG_MACH_IMX27LITE=y
CONFIG_MACH_PCA100=y
CONFIG_MACH_MXT_TD60=y
CONFIG_MACH_IMX27IPCAM=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_MXC_PWM=y
CONFIG_NO_HZ=y
@ -39,7 +42,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_FPE_NWFPE=y
CONFIG_FPE_NWFPE_XP=y
CONFIG_PM=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
@ -55,8 +57,9 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
@ -69,12 +72,15 @@ CONFIG_MTD_CFI_GEOMETRY=y
CONFIG_MTD_CFI_INTELEXT=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_MTD_UBI=y
CONFIG_MISC_DEVICES=y
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_FEC=y
CONFIG_SMC91X=y
CONFIG_DM9000=y
CONFIG_SMC911X=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_INPUT_MOUSEDEV is not set
@ -84,10 +90,10 @@ CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=m
# CONFIG_SERIO is not set
# CONFIG_LEGACY_PTYS is not set
CONFIG_SERIAL_8250=m
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
@ -98,19 +104,56 @@ CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
# CONFIG_HWMON is not set
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_MFD_MC13XXX=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_MC13783=y
CONFIG_REGULATOR_MC13892=y
CONFIG_FB=y
CONFIG_FB_IMX=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y
CONFIG_LCD_CLASS_DEVICE=y
CONFIG_BACKLIGHT_CLASS_DEVICE=y
CONFIG_BACKLIGHT_PWM=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
# CONFIG_HID_SUPPORT is not set
CONFIG_USB=m
CONFIG_LOGO=y
CONFIG_SOUND=y
CONFIG_SND=y
# CONFIG_SND_ARM is not set
# CONFIG_SND_SPI is not set
CONFIG_SND_SOC=y
CONFIG_SND_IMX_SOC=y
CONFIG_SND_SOC_MX27VIS_AIC32X4=y
CONFIG_SND_SOC_PHYCORE_AC97=y
CONFIG_SND_SOC_EUKREA_TLV320=y
CONFIG_USB_HID=m
CONFIG_USB=y
# CONFIG_USB_DEVICE_CLASS is not set
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_ULPI=y
CONFIG_MMC=y
CONFIG_MMC_MXC=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_LEDS_MC13783=y
CONFIG_LEDS_TRIGGERS=y
CONFIG_LEDS_TRIGGER_TIMER=y
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
CONFIG_LEDS_TRIGGER_GPIO=y
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_PCF8563=y
CONFIG_RTC_DRV_IMXDI=y
CONFIG_RTC_MXC=y
CONFIG_DMADEVICES=y
CONFIG_IMX_SDMA=y
CONFIG_IMX_DMA=y
# CONFIG_IOMMU_SUPPORT is not set
# CONFIG_DNOTIFY is not set
# CONFIG_PROC_PAGE_MONITOR is not set
CONFIG_TMPFS=y
@ -119,12 +162,9 @@ CONFIG_UBIFS_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
CONFIG_NLS=y
CONFIG_NLS_CODEPAGE_437=m
CONFIG_NLS_CODEPAGE_850=m
CONFIG_NLS_ISO8859_1=y
CONFIG_NLS_ISO8859_15=m
CONFIG_DEBUG_FS=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

91
arch/arm/configs/mx1_defconfig
View File

@ -1,91 +0,0 @@
CONFIG_EXPERIMENTAL=y
CONFIG_SYSVIPC=y
CONFIG_IKCONFIG=y
CONFIG_IKCONFIG_PROC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
CONFIG_EXPERT=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MX1=y
CONFIG_ARCH_MX1ADS=y
CONFIG_MACH_SCB9328=y
CONFIG_MACH_APF9328=y
CONFIG_MXC_IRQ_PRIOR=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off"
CONFIG_PM=y
CONFIG_PM_DEBUG=y
CONFIG_NET=y
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
CONFIG_FW_LOADER=m
CONFIG_MTD=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_PHYSMAP=y
# CONFIG_BLK_DEV is not set
# CONFIG_MISC_DEVICES is not set
CONFIG_NETDEVICES=y
CONFIG_PHYLIB=y
CONFIG_SMSC_PHY=y
CONFIG_NET_ETHERNET=y
CONFIG_DM9000=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_INPUT is not set
# CONFIG_SERIO is not set
# CONFIG_VT is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_W1=y
CONFIG_W1_MASTER_MXC=y
CONFIG_W1_SLAVE_THERM=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_USB_GADGET=y
CONFIG_USB_GADGET_IMX=y
CONFIG_USB_ETH=m
CONFIG_MMC=y
CONFIG_MMC_MXC=y
# CONFIG_DNOTIFY is not set
CONFIG_INOTIFY=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_NFS_V4=y
CONFIG_ROOT_NFS=y
# CONFIG_ENABLE_WARN_DEPRECATED is not set
# CONFIG_ENABLE_MUST_CHECK is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

97
arch/arm/configs/mx21_defconfig
View File

@ -1,97 +0,0 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_SWAP is not set
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=14
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_EXPERT=y
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_SLAB=y
CONFIG_MODULES=y
CONFIG_MODULE_UNLOAD=y
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MX2=y
CONFIG_MACH_MX21ADS=y
CONFIG_MXC_PWM=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_PREEMPT=y
CONFIG_AEABI=y
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_NET=y
CONFIG_INET=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
CONFIG_IP_PNP_BOOTP=y
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
# CONFIG_INET_LRO is not set
# CONFIG_INET_DIAG is not set
# CONFIG_IPV6 is not set
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_FW_LOADER is not set
CONFIG_MTD=y
CONFIG_MTD_DEBUG=y
CONFIG_MTD_DEBUG_VERBOSE=3
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_CFI=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_MXC=y
CONFIG_NETDEVICES=y
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_KEYBOARD is not set
# CONFIG_INPUT_MOUSE is not set
CONFIG_INPUT_TOUCHSCREEN=y
# CONFIG_SERIO is not set
# CONFIG_CONSOLE_TRANSLATIONS is not set
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_HW_RANDOM is not set
CONFIG_I2C=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_IMX=y
CONFIG_SPI=y
# CONFIG_HWMON is not set
CONFIG_FB=y
CONFIG_FB_IMX=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_FONTS=y
CONFIG_FONT_8x8=y
CONFIG_LOGO=y
# CONFIG_HID_SUPPORT is not set
# CONFIG_USB_SUPPORT is not set
CONFIG_MMC=y
CONFIG_MMC_MXC=y
# CONFIG_DNOTIFY is not set
CONFIG_MSDOS_FS=y
CONFIG_TMPFS=y
CONFIG_JFFS2_FS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
CONFIG_ROOT_NFS=y
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
CONFIG_SYSCTL_SYSCALL_CHECK=y
# CONFIG_CRYPTO_ANSI_CPRNG is not set

60
arch/arm/configs/mx51_defconfig → arch/arm/configs/mx5_defconfig
View File

@ -1,5 +1,6 @@
CONFIG_EXPERIMENTAL=y
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_KERNEL_LZO=y
CONFIG_SYSVIPC=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_RELAY=y
@ -13,21 +14,29 @@ CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
CONFIG_ARCH_MXC=y
CONFIG_ARCH_MX51=y
CONFIG_ARCH_MX5=y
CONFIG_MACH_MX51_BABBAGE=y
CONFIG_MACH_MX51_3DS=y
CONFIG_MACH_EUKREA_CPUIMX51=y
CONFIG_MACH_EUKREA_CPUIMX51SD=y
CONFIG_MACH_MX51_EFIKAMX=y
CONFIG_MACH_MX51_EFIKASB=y
CONFIG_MACH_MX53_EVK=y
CONFIG_MACH_MX53_SMD=y
CONFIG_MACH_MX53_LOCO=y
CONFIG_MACH_MX53_ARD=y
CONFIG_MXC_PWM=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_VMSPLIT_2G=y
CONFIG_PREEMPT_VOLUNTARY=y
CONFIG_AEABI=y
# CONFIG_OABI_COMPAT is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=32768
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp"
CONFIG_CMDLINE="noinitrd console=ttymxc0,115200"
CONFIG_VFP=y
CONFIG_NEON=y
CONFIG_BINFMT_MISC=m
CONFIG_PM=y
CONFIG_PM_DEBUG=y
CONFIG_PM_TEST_SUSPEND=y
CONFIG_NET=y
@ -42,13 +51,13 @@ CONFIG_IP_PNP_DHCP=y
# CONFIG_INET_LRO is not set
# CONFIG_IPV6 is not set
# CONFIG_WIRELESS is not set
CONFIG_DEVTMPFS=y
CONFIG_DEVTMPFS_MOUNT=y
# CONFIG_STANDALONE is not set
CONFIG_CONNECTOR=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_SIZE=65536
# CONFIG_MISC_DEVICES is not set
CONFIG_SCSI=y
# CONFIG_SCSI_PROC_FS is not set
CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
@ -56,8 +65,10 @@ CONFIG_SCSI_CONSTANTS=y
CONFIG_SCSI_LOGGING=y
CONFIG_SCSI_SCAN_ASYNC=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_ATA=m
CONFIG_ATA=y
CONFIG_PATA_IMX=y
CONFIG_NETDEVICES=y
CONFIG_MII=m
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
@ -71,49 +82,57 @@ CONFIG_REALTEK_PHY=y
CONFIG_NATIONAL_PHY=y
CONFIG_STE10XP=y
CONFIG_LSI_ET1011C_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_GPIO=y
CONFIG_MICREL_PHY=y
CONFIG_NET_ETHERNET=y
CONFIG_MII=m
CONFIG_FEC=y
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set
CONFIG_INPUT_FF_MEMLESS=m
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
CONFIG_INPUT_EVDEV=y
CONFIG_KEYBOARD_GPIO=y
CONFIG_INPUT_EVBUG=m
CONFIG_KEYBOARD_GPIO=y
CONFIG_MOUSE_PS2=m
CONFIG_MOUSE_PS2_ELANTECH=y
CONFIG_INPUT_MISC=y
CONFIG_INPUT_MMA8450=y
CONFIG_SERIO_SERPORT=m
CONFIG_VT_HW_CONSOLE_BINDING=y
# CONFIG_LEGACY_PTYS is not set
# CONFIG_DEVKMEM is not set
CONFIG_SERIAL_IMX=y
CONFIG_SERIAL_IMX_CONSOLE=y
# CONFIG_LEGACY_PTYS is not set
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=m
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_ALGOBIT=m
CONFIG_I2C_ALGOPCF=m
CONFIG_I2C_ALGOPCA=m
CONFIG_I2C_IMX=y
CONFIG_SPI=y
CONFIG_SPI_IMX=y
CONFIG_GPIO_SYSFS=y
# CONFIG_HWMON is not set
# CONFIG_HID_SUPPORT is not set
CONFIG_WATCHDOG=y
CONFIG_IMX2_WDT=y
CONFIG_MFD_MC13XXX=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_MC13892=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_EHCI_MXC=y
CONFIG_USB_STORAGE=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=m
CONFIG_MMC_SDHCI=m
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_SDHCI_ESDHC_IMX=y
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_INTF_DEV_UIE_EMUL=y
CONFIG_RTC_MXC=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
CONFIG_EXT2_FS_POSIX_ACL=y
@ -127,7 +146,6 @@ CONFIG_EXT4_FS_SECURITY=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
CONFIG_AUTOFS_FS=y
CONFIG_AUTOFS4_FS=y
CONFIG_FUSE_FS=y
CONFIG_ISO9660_FS=m
@ -151,17 +169,13 @@ CONFIG_NLS_ISO8859_15=m
CONFIG_NLS_UTF8=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_KERNEL=y
# CONFIG_SCHED_DEBUG is not set
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
# CONFIG_FTRACE is not set
# CONFIG_ARM_UNWIND is not set
CONFIG_DEBUG_LL=y
CONFIG_EARLY_PRINTK=y
CONFIG_SECURITYFS=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_DEFLATE=m
CONFIG_CRYPTO_LZO=m
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_HW is not set
CONFIG_CRC_CCITT=m

50
arch/arm/mach-imx/Kconfig
View File

@ -5,6 +5,18 @@ config IMX_HAVE_DMA_V1
# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
# more sensible) names are used: SOC_IMX31 and SOC_IMX35
config ARCH_MX1
bool
config MACH_MX21
bool
config ARCH_MX25
bool
config MACH_MX27
bool
config ARCH_MX31
bool
@ -13,6 +25,7 @@ config ARCH_MX35
config SOC_IMX1
bool
select ARCH_MX1
select CPU_ARM920T
select IMX_HAVE_DMA_V1
select IMX_HAVE_IOMUX_V1
@ -20,6 +33,7 @@ config SOC_IMX1
config SOC_IMX21
bool
select MACH_MX21
select CPU_ARM926T
select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
@ -28,6 +42,7 @@ config SOC_IMX21
config SOC_IMX25
bool
select ARCH_MX25
select CPU_ARM926T
select ARCH_MXC_AUDMUX_V2
select ARCH_MXC_IOMUX_V3
@ -35,6 +50,7 @@ config SOC_IMX25
config SOC_IMX27
bool
select MACH_MX27
select CPU_ARM926T
select ARCH_MXC_AUDMUX_V1
select IMX_HAVE_DMA_V1
@ -59,7 +75,7 @@ config SOC_IMX35
select MXC_AVIC
if ARCH_MX1
if ARCH_IMX_V4_V5
comment "MX1 platforms:"
config MACH_MXLADS
@ -87,30 +103,6 @@ config MACH_APF9328
help
Say Yes here if you are using the Armadeus APF9328 development board
endif
if ARCH_MX2
choice
prompt "CPUs:"
default MACH_MX21
config MACH_MX21
bool "i.MX21 support"
help
This enables support for Freescale's MX2 based i.MX21 processor.
config MACH_MX27
bool "i.MX27 support"
help
This enables support for Freescale's MX2 based i.MX27 processor.
endchoice
endif
if MACH_MX21
comment "MX21 platforms:"
config MACH_MX21ADS
@ -124,10 +116,6 @@ config MACH_MX21ADS
Include support for MX21ADS platform. This includes specific
configurations for the board and its peripherals.
endif
if ARCH_MX25
comment "MX25 platforms:"
config MACH_MX25_3DS
@ -175,10 +163,6 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
endchoice
endif
if MACH_MX27
comment "MX27 platforms:"
config MACH_MX27ADS

2
arch/arm/mach-imx/Makefile
View File

@ -3,7 +3,7 @@ obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o
obj-$(CONFIG_ARCH_MX1) += clock-imx1.o mm-imx1.o
obj-$(CONFIG_MACH_MX21) += clock-imx21.o mm-imx21.o
obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o
obj-$(CONFIG_ARCH_MX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o
obj-$(CONFIG_MACH_MX27) += cpu-imx27.o pm-imx27.o
obj-$(CONFIG_MACH_MX27) += clock-imx27.o mm-imx27.o ehci-imx27.o

6
arch/arm/mach-imx/clock-imx25.c
View File

@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL);
DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk);
DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL);
#define _REGISTER_CLOCK(d, n, c) \
{ \
@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
/* i.mx25 has the i.mx35 type sdma */
_REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk)
_REGISTER_CLOCK(NULL, "iim", iim_clk)
};
int __init mx25_clocks_init(void)
@ -334,6 +336,10 @@ int __init mx25_clocks_init(void)
/* Clock source for gpt is ahb_div */
__raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64);
clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX25", mx25_revision());
clk_disable(&iim_clk);
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
return 0;

6
arch/arm/mach-imx/clock-imx27.c
View File

@ -583,7 +583,7 @@ DEFINE_CLOCK(emi_clk, 0, PCCR1, 19, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(dma_clk1, 0, PCCR1, 20, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(csi_clk1, 0, PCCR1, 21, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(brom_clk, 0, PCCR1, 22, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(ata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(pata_clk, 0, PCCR1, 23, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(wdog_clk, 0, PCCR1, 24, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(usb_clk, 0, PCCR1, 25, get_rate_usb, &usb_clk1, &spll_clk);
DEFINE_CLOCK(uart6_clk1, 0, PCCR1, 26, NULL, NULL, &ipg_clk);
@ -666,7 +666,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("imx27-fec.0", NULL, fec_clk)
_REGISTER_CLOCK(NULL, "emi", emi_clk)
_REGISTER_CLOCK(NULL, "sahara2", sahara2_clk)
_REGISTER_CLOCK(NULL, "ata", ata_clk)
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
_REGISTER_CLOCK(NULL, "mstick", mstick_clk)
_REGISTER_CLOCK("imx2-wdt.0", NULL, wdog_clk)
_REGISTER_CLOCK(NULL, "gpio", gpio_clk)
@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref)
clk_enable(&gpio_clk);
clk_enable(&emi_clk);
clk_enable(&iim_clk);
imx_print_silicon_rev("i.MX27", mx27_revision());
clk_disable(&iim_clk);
#if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC)
clk_enable(&uart1_clk);

8
arch/arm/mach-imx/clock-imx31.c
View File

@ -476,7 +476,7 @@ DEFINE_CLOCK(gpt_clk, 0, MXC_CCM_CGR0, 4, NULL, NULL, &perclk_clk);
DEFINE_CLOCK(epit1_clk, 0, MXC_CCM_CGR0, 6, NULL, NULL, &perclk_clk);
DEFINE_CLOCK(epit2_clk, 1, MXC_CCM_CGR0, 8, NULL, NULL, &perclk_clk);
DEFINE_CLOCK(iim_clk, 0, MXC_CCM_CGR0, 10, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(ata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CGR0, 12, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(sdma_clk1, 0, MXC_CCM_CGR0, 14, NULL, NULL, &ahb_clk);
DEFINE_CLOCK(cspi3_clk, 2, MXC_CCM_CGR0, 16, NULL, NULL, &ipg_clk);
DEFINE_CLOCK(rng_clk, 0, MXC_CCM_CGR0, 18, NULL, NULL, &ipg_clk);
@ -562,7 +562,7 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk)
_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
_REGISTER_CLOCK(NULL, "firi", firi_clk)
_REGISTER_CLOCK(NULL, "ata", ata_clk)
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
_REGISTER_CLOCK(NULL, "rtic", rtic_clk)
_REGISTER_CLOCK(NULL, "rng", rng_clk)
_REGISTER_CLOCK("imx31-sdma", NULL, sdma_clk1)
@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref)
clk_enable(&gpt_clk);
clk_enable(&emi_clk);
clk_enable(&iim_clk);
mx31_revision();
clk_disable(&iim_clk);
clk_enable(&serial_pll_clk);
mx31_read_cpu_rev();
if (mx31_revision() >= IMX_CHIP_REVISION_2_0) {
reg = __raw_readl(MXC_CCM_PMCR1);
/* No PLL restart on DVFS switch; enable auto EMI handshake */

7
arch/arm/mach-imx/clock-imx35.c
View File

@ -354,7 +354,7 @@ static void clk_cgr_disable(struct clk *clk)
}
DEFINE_CLOCK(asrc_clk, 0, CCM_CGR0, 0, NULL, NULL);
DEFINE_CLOCK(ata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL);
DEFINE_CLOCK(pata_clk, 0, CCM_CGR0, 2, get_rate_ipg, NULL);
/* DEFINE_CLOCK(audmux_clk, 0, CCM_CGR0, 4, NULL, NULL); */
DEFINE_CLOCK(can1_clk, 0, CCM_CGR0, 6, get_rate_ipg, NULL);
DEFINE_CLOCK(can2_clk, 1, CCM_CGR0, 8, get_rate_ipg, NULL);
@ -447,7 +447,7 @@ static struct clk nfc_clk = {
static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "asrc", asrc_clk)
_REGISTER_CLOCK(NULL, "ata", ata_clk)
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
_REGISTER_CLOCK("flexcan.0", NULL, can1_clk)
_REGISTER_CLOCK("flexcan.1", NULL, can2_clk)
_REGISTER_CLOCK("imx35-cspi.0", NULL, cspi1_clk)
@ -537,7 +537,8 @@ int __init mx35_clocks_init()
__raw_writel(cgr3, CCM_BASE + CCM_CGR3);
clk_enable(&iim_clk);
mx35_read_cpu_rev();
imx_print_silicon_rev("i.MX35", mx35_revision());
clk_disable(&iim_clk);
#ifdef CONFIG_MXC_USE_EPIT
epit_timer_init(&epit1_clk,

41
arch/arm/mach-imx/cpu-imx25.c Normal file
View File

@ -0,0 +1,41 @@
/*
* MX25 CPU type detection
*
* Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
* Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#include <linux/module.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/iim.h>
static int mx25_cpu_rev = -1;
static int mx25_read_cpu_rev(void)
{
u32 rev;
rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV));
switch (rev) {
case 0x00:
return IMX_CHIP_REVISION_1_0;
case 0x01:
return IMX_CHIP_REVISION_1_1;
default:
return IMX_CHIP_REVISION_UNKNOWN;
}
}
int mx25_revision(void)
{
if (mx25_cpu_rev == -1)
mx25_cpu_rev = mx25_read_cpu_rev();
return mx25_cpu_rev;
}
EXPORT_SYMBOL(mx25_revision);

28
arch/arm/mach-imx/cpu-imx27.c
View File

@ -26,12 +26,12 @@
#include <mach/hardware.h>
static int cpu_silicon_rev = -1;
static int cpu_partnumber;
static int mx27_cpu_rev = -1;
static int mx27_cpu_partnumber;
#define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */
static void query_silicon_parameter(void)
static int mx27_read_cpu_rev(void)
{
u32 val;
/*
@ -42,20 +42,18 @@ static void query_silicon_parameter(void)
val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR
+ SYS_CHIP_ID));
mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF);
switch (val >> 28) {
case 0:
cpu_silicon_rev = IMX_CHIP_REVISION_1_0;
break;
return IMX_CHIP_REVISION_1_0;
case 1:
cpu_silicon_rev = IMX_CHIP_REVISION_2_0;
break;
return IMX_CHIP_REVISION_2_0;
case 2:
cpu_silicon_rev = IMX_CHIP_REVISION_2_1;
break;
return IMX_CHIP_REVISION_2_1;
default:
cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN;
return IMX_CHIP_REVISION_UNKNOWN;
}
cpu_partnumber = (int)((val >> 12) & 0xFFFF);
}
/*
@ -65,12 +63,12 @@ static void query_silicon_parameter(void)
*/
int mx27_revision(void)
{
if (cpu_silicon_rev == -1)
query_silicon_parameter();
if (mx27_cpu_rev == -1)
mx27_cpu_rev = mx27_read_cpu_rev();
if (cpu_partnumber != 0x8821)
if (mx27_cpu_partnumber != 0x8821)
return -EINVAL;
return cpu_silicon_rev;
return mx27_cpu_rev;
}
EXPORT_SYMBOL(mx27_revision);

51
arch/arm/mach-imx/cpu-imx31.c
View File

@ -13,45 +13,50 @@
#include <linux/io.h>
#include <mach/hardware.h>
#include <mach/iim.h>
#include <mach/common.h>
unsigned int mx31_cpu_rev;
EXPORT_SYMBOL(mx31_cpu_rev);
static int mx31_cpu_rev = -1;
static struct {
u8 srev;
const char *name;
const char *v;
unsigned int rev;
} mx31_cpu_type[] __initdata = {
{ .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 },
{ .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
{ .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 },
{ .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
{ .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 },
} mx31_cpu_type[] = {
{ .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 },
{ .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 },
{ .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 },
{ .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 },
{ .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 },
{ .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 },
};
void __init mx31_read_cpu_rev(void)
static int mx31_read_cpu_rev(void)
{
u32 i, srev;
/* read SREV register from IIM module */
srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV));
srev &= 0xff;
for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++)
if (srev == mx31_cpu_type[i].srev) {
printk(KERN_INFO
"CPU identified as %s, silicon rev %s\n",
mx31_cpu_type[i].name, mx31_cpu_type[i].v);
mx31_cpu_rev = mx31_cpu_type[i].rev;
return;
imx_print_silicon_rev(mx31_cpu_type[i].name,
mx31_cpu_type[i].rev);
return mx31_cpu_type[i].rev;
}
mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev);
imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN);
return IMX_CHIP_REVISION_UNKNOWN;
}
int mx31_revision(void)
{
if (mx31_cpu_rev == -1)
mx31_cpu_rev = mx31_read_cpu_rev();
return mx31_cpu_rev;
}
EXPORT_SYMBOL(mx31_revision);

32
arch/arm/mach-imx/cpu-imx35.c
View File

@ -13,32 +13,30 @@
#include <mach/hardware.h>
#include <mach/iim.h>
unsigned int mx35_cpu_rev;
EXPORT_SYMBOL(mx35_cpu_rev);
static int mx35_cpu_rev = -1;
void __init mx35_read_cpu_rev(void)
static int mx35_read_cpu_rev(void)
{
u32 rev;
char *srev;
rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
switch (rev) {
case 0x00:
mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
srev = "1.0";
break;
return IMX_CHIP_REVISION_1_0;
case 0x10:
mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
srev = "2.0";
break;
return IMX_CHIP_REVISION_2_0;
case 0x11:
mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
srev = "2.1";
break;
return IMX_CHIP_REVISION_2_1;
default:
mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
srev = "unknown";
return IMX_CHIP_REVISION_UNKNOWN;
}
printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
}
int mx35_revision(void)
{
if (mx35_cpu_rev == -1)
mx35_cpu_rev = mx35_read_cpu_rev();
return mx35_cpu_rev;
}
EXPORT_SYMBOL(mx35_revision);

4
arch/arm/mach-imx/devices-imx27.h
View File

@ -76,3 +76,7 @@ extern const struct imx_spi_imx_data imx27_cspi_data[];
#define imx27_add_spi_imx0(pdata) imx27_add_cspi(0, pdata)
#define imx27_add_spi_imx1(pdata) imx27_add_cspi(1, pdata)
#define imx27_add_spi_imx2(pdata) imx27_add_cspi(2, pdata)
extern const struct imx_pata_imx_data imx27_pata_imx_data;
#define imx27_add_pata_imx() \
imx_add_pata_imx(&imx27_pata_imx_data)

4
arch/arm/mach-imx/devices-imx31.h
View File

@ -78,3 +78,7 @@ extern const struct imx_spi_imx_data imx31_cspi_data[];
#define imx31_add_spi_imx0(pdata) imx31_add_cspi(0, pdata)
#define imx31_add_spi_imx1(pdata) imx31_add_cspi(1, pdata)
#define imx31_add_spi_imx2(pdata) imx31_add_cspi(2, pdata)
extern const struct imx_pata_imx_data imx31_pata_imx_data;
#define imx31_add_pata_imx() \
imx_add_pata_imx(&imx31_pata_imx_data)

4
arch/arm/mach-imx/devices-imx35.h
View File

@ -81,3 +81,7 @@ extern const struct imx_spi_imx_data imx35_cspi_data[];
imx_add_spi_imx(&imx35_cspi_data[id], pdata)
#define imx35_add_spi_imx0(pdata) imx35_add_cspi(0, pdata)
#define imx35_add_spi_imx1(pdata) imx35_add_cspi(1, pdata)
extern const struct imx_pata_imx_data imx35_pata_imx_data;
#define imx35_add_pata_imx() \
imx_add_pata_imx(&imx35_pata_imx_data)

19
arch/arm/mach-mx5/Kconfig
View File

@ -1,8 +1,9 @@
if ARCH_MX503 || ARCH_MX51
if ARCH_MX5
# ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single
# image. So for most time, SOC_IMX50/51/53 should be used.
config ARCH_MX5
config ARCH_MX51
bool
config ARCH_MX50
@ -19,7 +20,6 @@ config SOC_IMX50
select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2
select ARCH_HAS_CPUFREQ
select ARCH_MX5
select ARCH_MX50
config SOC_IMX51
@ -30,7 +30,7 @@ config SOC_IMX51
select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2
select ARCH_HAS_CPUFREQ
select ARCH_MX5
select ARCH_MX51
config SOC_IMX53
bool
@ -38,10 +38,8 @@ config SOC_IMX53
select ARM_L1_CACHE_SHIFT_6
select MXC_TZIC
select ARCH_MXC_IOMUX_V3
select ARCH_MX5
select ARCH_MX53
if ARCH_MX50_SUPPORTED
#comment "i.MX50 machines:"
config MACH_MX50_RDP
@ -57,9 +55,6 @@ config MACH_MX50_RDP
Include support for MX50 reference design platform (RDP) board. This
includes specific configurations for the board and its peripherals.
endif # ARCH_MX50_SUPPORTED
if ARCH_MX51
comment "i.MX51 machines:"
config MACH_MX51_BABBAGE
@ -147,6 +142,7 @@ config MX51_EFIKA_COMMON
bool
select SOC_IMX51
select IMX_HAVE_PLATFORM_IMX_UART
select IMX_HAVE_PLATFORM_PATA_IMX
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
select IMX_HAVE_PLATFORM_SPI_IMX
select MXC_ULPI if USB_ULPI
@ -167,9 +163,6 @@ config MACH_MX51_EFIKASB
Include support for Genesi Efika Smartbook. This includes specific
configurations for the board and its peripherals.
endif # ARCH_MX51
if ARCH_MX53_SUPPORTED
comment "i.MX53 machines:"
config MACH_MX53_EVK
@ -221,6 +214,4 @@ config MACH_MX53_ARD
Include support for MX53 ARD platform. This includes specific
configurations for the board and its peripherals.
endif # ARCH_MX53_SUPPORTED
endif

12
arch/arm/mach-mx5/clock-mx51-mx53.c
View File

@ -1418,6 +1418,10 @@ DEFINE_CLOCK(ipu_di0_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG5_OFFSET,
DEFINE_CLOCK(ipu_di1_clk, 0, MXC_CCM_CCGR6, MXC_CCM_CCGRx_CG6_OFFSET,
NULL, NULL, &pll3_sw_clk, NULL);
/* PATA */
DEFINE_CLOCK(pata_clk, 0, MXC_CCM_CCGR4, MXC_CCM_CCGRx_CG0_OFFSET,
NULL, NULL, &ipg_clk, &spba_clk);
#define _REGISTER_CLOCK(d, n, c) \
{ \
.dev_id = d, \
@ -1474,6 +1478,7 @@ static struct clk_lookup mx51_lookups[] = {
_REGISTER_CLOCK("imx-ipuv3", "di0", ipu_di0_clk)
_REGISTER_CLOCK("imx-ipuv3", "di1", ipu_di1_clk)
_REGISTER_CLOCK(NULL, "gpc_dvfs", gpc_dvfs_clk)
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
};
static struct clk_lookup mx53_lookups[] = {
@ -1507,6 +1512,7 @@ static struct clk_lookup mx53_lookups[] = {
_REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk)
_REGISTER_CLOCK("imx-ssi.2", NULL, ssi3_clk)
_REGISTER_CLOCK("imx-keypad", NULL, dummy_clk)
_REGISTER_CLOCK("pata_imx", NULL, pata_clk)
};
static void clk_tree_init(void)
@ -1548,9 +1554,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc,
clk_enable(&main_bus_clk);
clk_enable(&iim_clk);
mx51_revision();
imx_print_silicon_rev("i.MX51", mx51_revision());
clk_disable(&iim_clk);
mx51_display_revision();
/* move usb_phy_clk to 24MHz */
clk_set_parent(&usb_phy1_clk, &osc_clk);
@ -1592,9 +1597,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
clk_enable(&main_bus_clk);
clk_enable(&iim_clk);
mx53_revision();
imx_print_silicon_rev("i.MX53", mx53_revision());
clk_disable(&iim_clk);
mx53_display_revision();
/* Set SDHC parents to be PLL2 */
clk_set_parent(&esdhc1_clk, &pll2_sw_clk);

74
arch/arm/mach-mx5/cpu.c
View File

@ -18,7 +18,7 @@
#include <mach/hardware.h>
#include <asm/io.h>
static int cpu_silicon_rev = -1;
static int mx5_cpu_rev = -1;
#define IIM_SREV 0x24
#define MX50_HW_ADADIG_DIGPROG 0xB0
@ -28,11 +28,14 @@ static int get_mx51_srev(void)
void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
u32 rev = readl(iim_base + IIM_SREV) & 0xff;
if (rev == 0x0)
switch (rev) {
case 0x0:
return IMX_CHIP_REVISION_2_0;
else if (rev == 0x10)
case 0x10:
return IMX_CHIP_REVISION_3_0;
return 0;
default:
return IMX_CHIP_REVISION_UNKNOWN;
}
}
/*
@ -45,33 +48,13 @@ int mx51_revision(void)
if (!cpu_is_mx51())
return -EINVAL;
if (cpu_silicon_rev == -1)
cpu_silicon_rev = get_mx51_srev();
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx51_srev();
return cpu_silicon_rev;
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx51_revision);
void mx51_display_revision(void)
{
int rev;
char *srev;
rev = mx51_revision();
switch (rev) {
case IMX_CHIP_REVISION_2_0:
srev = IMX_CHIP_REVISION_2_0_STRING;
break;
case IMX_CHIP_REVISION_3_0:
srev = IMX_CHIP_REVISION_3_0_STRING;
break;
default:
srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
}
printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);
}
EXPORT_SYMBOL(mx51_display_revision);
#ifdef CONFIG_NEON
/*
@ -121,10 +104,10 @@ int mx53_revision(void)
if (!cpu_is_mx53())
return -EINVAL;
if (cpu_silicon_rev == -1)
cpu_silicon_rev = get_mx53_srev();
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx53_srev();
return cpu_silicon_rev;
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx53_revision);
@ -134,7 +117,7 @@ static int get_mx50_srev(void)
u32 rev;
if (!anatop) {
cpu_silicon_rev = -EINVAL;
mx5_cpu_rev = -EINVAL;
return 0;
}
@ -159,36 +142,13 @@ int mx50_revision(void)
if (!cpu_is_mx50())
return -EINVAL;
if (cpu_silicon_rev == -1)
cpu_silicon_rev = get_mx50_srev();
if (mx5_cpu_rev == -1)
mx5_cpu_rev = get_mx50_srev();
return cpu_silicon_rev;
return mx5_cpu_rev;
}
EXPORT_SYMBOL(mx50_revision);
void mx53_display_revision(void)
{
int rev;
char *srev;
rev = mx53_revision();
switch (rev) {
case IMX_CHIP_REVISION_1_0:
srev = IMX_CHIP_REVISION_1_0_STRING;
break;
case IMX_CHIP_REVISION_2_0:
srev = IMX_CHIP_REVISION_2_0_STRING;
break;
case IMX_CHIP_REVISION_2_1:
srev = IMX_CHIP_REVISION_2_1_STRING;
break;
default:
srev = IMX_CHIP_REVISION_UNKNOWN_STRING;
}
printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev);
}
EXPORT_SYMBOL(mx53_display_revision);
static int __init post_cpu_init(void)
{
unsigned int reg;

4
arch/arm/mach-mx5/devices-imx51.h
View File

@ -52,3 +52,7 @@ extern const struct imx_mxc_pwm_data imx51_mxc_pwm_data[];
extern const struct imx_imx_keypad_data imx51_imx_keypad_data;
#define imx51_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx51_imx_keypad_data, pdata)
extern const struct imx_pata_imx_data imx51_pata_imx_data;
#define imx51_add_pata_imx() \
imx_add_pata_imx(&imx51_pata_imx_data)

4
arch/arm/mach-mx5/devices-imx53.h
View File

@ -40,3 +40,7 @@ extern const struct imx_imx_ssi_data imx53_imx_ssi_data[];
extern const struct imx_imx_keypad_data imx53_imx_keypad_data;
#define imx53_add_imx_keypad(pdata) \
imx_add_imx_keypad(&imx53_imx_keypad_data, pdata)
extern const struct imx_pata_imx_data imx53_pata_imx_data;
#define imx53_add_pata_imx() \
imx_add_pata_imx(&imx53_pata_imx_data)

2
arch/arm/mach-mx5/mx51_efika.c
View File

@ -627,6 +627,8 @@ void __init efika_board_common_init(void)
ARRAY_SIZE(mx51_efika_spi_board_info));
imx51_add_ecspi(0, &mx51_efika_spi_pdata);
imx51_add_pata_imx();
#if defined(CONFIG_CPU_FREQ_IMX)
get_cpu_op = mx51_get_cpu_op;
#endif

6
arch/arm/mach-mxs/Kconfig
View File

@ -23,6 +23,7 @@ config MACH_STMP378X_DEVB
select MXS_HAVE_AMBA_DUART
select MXS_HAVE_PLATFORM_AUART
select MXS_HAVE_PLATFORM_MXS_MMC
select MXS_HAVE_PLATFORM_RTC_STMP3XXX
help
Include support for STMP378x-devb platform. This includes specific
configurations for the board and its peripherals.
@ -34,6 +35,7 @@ config MACH_MX23EVK
select MXS_HAVE_PLATFORM_AUART
select MXS_HAVE_PLATFORM_MXS_MMC
select MXS_HAVE_PLATFORM_MXSFB
select MXS_HAVE_PLATFORM_RTC_STMP3XXX
help
Include support for MX23EVK platform. This includes specific
configurations for the board and its peripherals.
@ -48,6 +50,9 @@ config MACH_MX28EVK
select MXS_HAVE_PLATFORM_FLEXCAN
select MXS_HAVE_PLATFORM_MXS_MMC
select MXS_HAVE_PLATFORM_MXSFB
select MXS_HAVE_PLATFORM_MXS_SAIF
select MXS_HAVE_PLATFORM_MXS_I2C
select MXS_HAVE_PLATFORM_RTC_STMP3XXX
select MXS_OCOTP
help
Include support for MX28EVK platform. This includes specific
@ -63,6 +68,7 @@ config MODULE_TX28
select MXS_HAVE_PLATFORM_MXS_I2C
select MXS_HAVE_PLATFORM_MXS_MMC
select MXS_HAVE_PLATFORM_MXS_PWM
select MXS_HAVE_PLATFORM_RTC_STMP3XXX
config MACH_TX28
bool "Ka-Ro TX28 module"

8
arch/arm/mach-mxs/clock-mx28.c
View File

@ -640,6 +640,8 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK(NULL, "lradc", lradc_clk)
_REGISTER_CLOCK(NULL, "spdif", spdif_clk)
_REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk)
_REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk)
_REGISTER_CLOCK("mxs-saif.1", NULL, saif1_clk)
};
static int clk_misc_init(void)
@ -708,11 +710,11 @@ static int clk_misc_init(void)
/* SAIF has to use frac div for functional operation */
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0);
reg &= ~BM_CLKCTRL_SAIF0_DIV_FRAC_EN;
reg |= BM_CLKCTRL_SAIF0_DIV_FRAC_EN;
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0);
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1);
reg &= ~BM_CLKCTRL_SAIF1_DIV_FRAC_EN;
reg |= BM_CLKCTRL_SAIF1_DIV_FRAC_EN;
__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1);
/*
@ -774,6 +776,8 @@ int __init mx28_clocks_init(void)
clk_enable(&uart_clk);
clk_set_parent(&lcdif_clk, &ref_pix_clk);
clk_set_parent(&saif0_clk, &pll0_clk);
clk_set_parent(&saif1_clk, &pll0_clk);
clkdev_add_table(lookups, ARRAY_SIZE(lookups));

2
arch/arm/mach-mxs/devices-mx23.h
View File

@ -29,3 +29,5 @@ extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst;
struct platform_device *__init mx23_add_mxsfb(
const struct mxsfb_platform_data *pdata);
struct platform_device *__init mx23_add_rtc_stmp3xxx(void);

5
arch/arm/mach-mxs/devices-mx28.h
View File

@ -45,3 +45,8 @@ extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst;
struct platform_device *__init mx28_add_mxsfb(
const struct mxsfb_platform_data *pdata);
extern const struct mxs_saif_data mx28_saif_data[] __initconst;
#define mx28_add_saif(id) mxs_add_saif(&mx28_saif_data[id])
struct platform_device *__init mx28_add_rtc_stmp3xxx(void);

6
arch/arm/mach-mxs/devices/Kconfig
View File

@ -23,3 +23,9 @@ config MXS_HAVE_PLATFORM_MXS_PWM
config MXS_HAVE_PLATFORM_MXSFB
bool
config MXS_HAVE_PLATFORM_MXS_SAIF
bool
config MXS_HAVE_PLATFORM_RTC_STMP3XXX
bool

2
arch/arm/mach-mxs/devices/Makefile
View File

@ -8,3 +8,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o
obj-y += platform-gpio-mxs.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_SAIF) += platform-mxs-saif.o
obj-$(CONFIG_MXS_HAVE_PLATFORM_RTC_STMP3XXX) += platform-rtc-stmp3xxx.o

60
arch/arm/mach-mxs/devices/platform-mxs-saif.c Normal file
View File

@ -0,0 +1,60 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <linux/compiler.h>
#include <linux/err.h>
#include <linux/init.h>
#include <mach/mx23.h>
#include <mach/mx28.h>
#include <mach/devices-common.h>
#define mxs_saif_data_entry_single(soc, _id) \
{ \
.id = _id, \
.iobase = soc ## _SAIF ## _id ## _BASE_ADDR, \
.irq = soc ## _INT_SAIF ## _id, \
.dma = soc ## _DMA_SAIF ## _id, \
.dmairq = soc ## _INT_SAIF ## _id ##_DMA, \
}
#define mxs_saif_data_entry(soc, _id) \
[_id] = mxs_saif_data_entry_single(soc, _id)
#ifdef CONFIG_SOC_IMX28
const struct mxs_saif_data mx28_saif_data[] __initconst = {
mxs_saif_data_entry(MX28, 0),
mxs_saif_data_entry(MX28, 1),
};
#endif
struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + SZ_4K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
}, {
.start = data->dma,
.end = data->dma,
.flags = IORESOURCE_DMA,
}, {
.start = data->dmairq,
.end = data->dmairq,
.flags = IORESOURCE_IRQ,
},
};
return mxs_add_platform_device("mxs-saif", data->id, res,
ARRAY_SIZE(res), NULL, 0);
}

51
arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c Normal file
View File

@ -0,0 +1,51 @@
/*
* Copyright (C) 2011 Pengutronix, Wolfram Sang <w.sang@pengutronix.de>
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <asm/sizes.h>
#include <mach/mx23.h>
#include <mach/mx28.h>
#include <mach/devices-common.h>
#ifdef CONFIG_SOC_IMX23
struct platform_device *__init mx23_add_rtc_stmp3xxx(void)
{
struct resource res[] = {
{
.start = MX23_RTC_BASE_ADDR,
.end = MX23_RTC_BASE_ADDR + SZ_8K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MX23_INT_RTC_ALARM,
.end = MX23_INT_RTC_ALARM,
.flags = IORESOURCE_IRQ,
},
};
return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res),
NULL, 0);
}
#endif /* CONFIG_SOC_IMX23 */
#ifdef CONFIG_SOC_IMX28
struct platform_device *__init mx28_add_rtc_stmp3xxx(void)
{
struct resource res[] = {
{
.start = MX28_RTC_BASE_ADDR,
.end = MX28_RTC_BASE_ADDR + SZ_8K - 1,
.flags = IORESOURCE_MEM,
}, {
.start = MX28_INT_RTC_ALARM,
.end = MX28_INT_RTC_ALARM,
.flags = IORESOURCE_IRQ,
},
};
return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res),
NULL, 0);
}
#endif /* CONFIG_SOC_IMX28 */

12
arch/arm/mach-mxs/include/mach/devices-common.h
View File

@ -92,3 +92,15 @@ struct platform_device *__init mxs_add_mxs_mmc(
/* pwm */
struct platform_device *__init mxs_add_mxs_pwm(
resource_size_t iobase, int id);
/* saif */
struct mxs_saif_data {
int id;
resource_size_t iobase;
resource_size_t irq;
resource_size_t dma;
resource_size_t dmairq;
};
struct platform_device *__init mxs_add_saif(
const struct mxs_saif_data *data);

1
arch/arm/mach-mxs/mach-mx23evk.c
View File

@ -167,6 +167,7 @@ static void __init mx23evk_init(void)
gpio_set_value(MX23EVK_BL_ENABLE, 1);
mx23_add_mxsfb(&mx23evk_mxsfb_pdata);
mx23_add_rtc_stmp3xxx();
}
static void __init mx23evk_timer_init(void)

78
arch/arm/mach-mxs/mach-mx28evk.c
View File

@ -18,6 +18,9 @@
#include <linux/leds.h>
#include <linux/irq.h>
#include <linux/clk.h>
#include <linux/i2c.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -183,6 +186,24 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = {
/* led */
MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL,
/* I2C */
MX28_PAD_I2C0_SCL__I2C0_SCL |
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_I2C0_SDA__I2C0_SDA |
(MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
/* saif0 & saif1 */
MX28_PAD_SAIF0_MCLK__SAIF0_MCLK |
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK |
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK |
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 |
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 |
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP),
};
/* led */
@ -352,6 +373,50 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = {
},
};
static struct i2c_board_info mxs_i2c0_board_info[] __initdata = {
{
I2C_BOARD_INFO("sgtl5000", 0x0a),
},
};
#if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE)
static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = {
REGULATOR_SUPPLY("VDDA", "0-000a"),
REGULATOR_SUPPLY("VDDIO", "0-000a"),
};
static struct regulator_init_data mx28evk_vdd_reg_init_data = {
.constraints = {
.name = "3V3",
.always_on = 1,
},
.consumer_supplies = mx28evk_audio_consumer_supplies,
.num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies),
};
static struct fixed_voltage_config mx28evk_vdd_pdata = {
.supply_name = "board-3V3",
.microvolts = 3300000,
.gpio = -EINVAL,
.enabled_at_boot = 1,
.init_data = &mx28evk_vdd_reg_init_data,
};
static struct platform_device mx28evk_voltage_regulator = {
.name = "reg-fixed-voltage",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &mx28evk_vdd_pdata,
},
};
static void __init mx28evk_add_regulators(void)
{
platform_device_register(&mx28evk_voltage_regulator);
}
#else
static void __init mx28evk_add_regulators(void) {}
#endif
static void __init mx28evk_init(void)
{
int ret;
@ -392,6 +457,18 @@ static void __init mx28evk_init(void)
mx28_add_mxsfb(&mx28evk_mxsfb_pdata);
mx28_add_saif(0);
mx28_add_saif(1);
mx28_add_mxs_i2c(0);
i2c_register_board_info(0, mxs_i2c0_board_info,
ARRAY_SIZE(mxs_i2c0_board_info));
mx28evk_add_regulators();
mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0,
NULL, 0);
/* power on mmc slot by writing 0 to the gpio */
ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW,
"mmc0-slot-power");
@ -404,6 +481,7 @@ static void __init mx28evk_init(void)
if (ret)
pr_warn("failed to request gpio mmc1-slot-power: %d\n", ret);
mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]);
mx28_add_rtc_stmp3xxx();
gpio_led_register_device(0, &mx28evk_led_data);
}

1
arch/arm/mach-mxs/mach-stmp378x_devb.c
View File

@ -91,6 +91,7 @@ static void __init stmp378x_dvb_init(void)
mx23_add_duart();
mx23_add_auart0();
mx23_add_rtc_stmp3xxx();
/* power on mmc slot */
ret = gpio_request_one(STMP378X_DEVB_MMC0_SLOT_POWER,

1
arch/arm/mach-mxs/mach-tx28.c
View File

@ -161,6 +161,7 @@ static void __init tx28_stk5v3_init(void)
i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo,
ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo));
mx28_add_mxs_mmc(0, &tx28_mmc0_pdata);
mx28_add_rtc_stmp3xxx();
}
static void __init tx28_timer_init(void)

39
arch/arm/plat-mxc/Kconfig
View File

@ -4,50 +4,31 @@ source "arch/arm/plat-mxc/devices/Kconfig"
menu "Freescale MXC Implementations"
config ARCH_MX50_SUPPORTED
bool
config ARCH_MX53_SUPPORTED
bool
choice
prompt "Freescale CPU family:"
default ARCH_MX3
config ARCH_MX1
bool "MX1-based"
config ARCH_IMX_V4_V5
bool "i.MX1, i.MX21, i.MX25, i.MX27"
select AUTO_ZRELADDR
select ARM_PATCH_PHYS_VIRT
help
This enables support for systems based on the Freescale i.MX1 family
config ARCH_MX2
bool "MX2-based"
help
This enables support for systems based on the Freescale i.MX2 family
config ARCH_MX25
bool "MX25-based"
help
This enables support for systems based on the Freescale i.MX25 family
This enables support for systems based on the Freescale i.MX ARMv4
and ARMv5 SoCs
config ARCH_MX3
bool "MX3-based"
help
This enables support for systems based on the Freescale i.MX3 family
config ARCH_MX503
bool "i.MX50 + i.MX53"
select ARCH_MX50_SUPPORTED
select ARCH_MX53_SUPPORTED
config ARCH_MX5
bool "i.MX50, i.MX51, i.MX53"
select AUTO_ZRELADDR
select ARM_PATCH_PHYS_VIRT
help
This enables support for machines using Freescale's i.MX50 and i.MX51
processors.
config ARCH_MX51
bool "i.MX51"
select ARCH_MX51_SUPPORTED
help
This enables support for systems based on the Freescale i.MX51 family
endchoice
source "arch/arm/mach-imx/Kconfig"

9
arch/arm/plat-mxc/cpu.c
View File

@ -1,5 +1,6 @@
#include <linux/module.h>
#include <mach/hardware.h>
unsigned int __mxc_cpu_type;
EXPORT_SYMBOL(__mxc_cpu_type);
@ -9,3 +10,11 @@ void mxc_set_cpu_type(unsigned int type)
__mxc_cpu_type = type;
}
void imx_print_silicon_rev(const char *cpu, int srev)
{
if (srev == IMX_CHIP_REVISION_UNKNOWN)
pr_info("CPU identified as %s, unknown revision\n", cpu);
else
pr_info("CPU identified as %s, silicon rev %d.%d\n",
cpu, (srev >> 4) & 0xf, srev & 0xf);
}

3
arch/arm/plat-mxc/devices/Kconfig
View File

@ -31,6 +31,9 @@ config IMX_HAVE_PLATFORM_IMX_I2C
config IMX_HAVE_PLATFORM_IMX_KEYPAD
bool
config IMX_HAVE_PLATFORM_PATA_IMX
bool
config IMX_HAVE_PLATFORM_IMX_SSI
bool

1
arch/arm/plat-mxc/devices/Makefile
View File

@ -10,6 +10,7 @@ obj-y += platform-imx-dma.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_FB) += platform-imx-fb.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_I2C) += platform-imx-i2c.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_KEYPAD) += platform-imx-keypad.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_PATA_IMX) += platform-pata_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_SSI) += platform-imx-ssi.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UART) += platform-imx-uart.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_IMX_UDC) += platform-imx_udc.o

59
arch/arm/plat-mxc/devices/platform-pata_imx.c Normal file
View File

@ -0,0 +1,59 @@
/*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
#include <mach/hardware.h>
#include <mach/devices-common.h>
#define imx_pata_imx_data_entry_single(soc, _size) \
{ \
.iobase = soc ## _ATA_BASE_ADDR, \
.iosize = _size, \
.irq = soc ## _INT_ATA, \
}
#ifdef CONFIG_SOC_IMX27
const struct imx_pata_imx_data imx27_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX27, SZ_4K);
#endif /* ifdef CONFIG_SOC_IMX27 */
#ifdef CONFIG_SOC_IMX31
const struct imx_pata_imx_data imx31_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX31, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
const struct imx_pata_imx_data imx35_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX35, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX35 */
#ifdef CONFIG_SOC_IMX51
const struct imx_pata_imx_data imx51_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX51, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX51 */
#ifdef CONFIG_SOC_IMX53
const struct imx_pata_imx_data imx53_pata_imx_data __initconst =
imx_pata_imx_data_entry_single(MX53, SZ_16K);
#endif /* ifdef CONFIG_SOC_IMX53 */
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data)
{
struct resource res[] = {
{
.start = data->iobase,
.end = data->iobase + data->iobase - 1,
.flags = IORESOURCE_MEM,
},
{
.start = data->irq,
.end = data->irq,
.flags = IORESOURCE_IRQ,
},
};
return imx_add_platform_device("pata_imx", -1,
res, ARRAY_SIZE(res), NULL, 0);
}

1
arch/arm/plat-mxc/include/mach/common.h
View File

@ -72,4 +72,5 @@ extern void mxc_arch_reset_init(void __iomem *);
extern void mx51_efikamx_reset(void);
extern int mx53_revision(void);
extern int mx53_display_revision(void);
extern void imx_print_silicon_rev(const char *cpu, int srev);
#endif

8
arch/arm/plat-mxc/include/mach/devices-common.h
View File

@ -251,6 +251,14 @@ struct platform_device *__init imx_add_mxc_nand(
const struct imx_mxc_nand_data *data,
const struct mxc_nand_platform_data *pdata);
struct imx_pata_imx_data {
resource_size_t iobase;
resource_size_t iosize;
resource_size_t irq;
};
struct platform_device *__init imx_add_pata_imx(
const struct imx_pata_imx_data *data);
struct imx_mxc_pwm_data {
int id;
resource_size_t iobase;

16
arch/arm/plat-mxc/include/mach/memory.h
View File

@ -21,22 +21,8 @@
#define MX53_PHYS_OFFSET UL(0x70000000)
#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
# if defined CONFIG_ARCH_MX1
# define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
# elif defined CONFIG_MACH_MX21
# define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX25
# define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET
# elif defined CONFIG_MACH_MX27
# define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX3
# if defined CONFIG_ARCH_MX3
# define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX50
# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX51
# define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET
# elif defined CONFIG_ARCH_MX53
# define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET
# endif
#endif

4
arch/arm/plat-mxc/include/mach/mx25.h
View File

@ -104,4 +104,8 @@
#define MX25_DMA_REQ_SSI1_RX0 28
#define MX25_DMA_REQ_SSI1_TX0 29
#ifndef __ASSEMBLY__
extern int mx25_revision(void);
#endif
#endif /* ifndef __MACH_MX25_H__ */

2
arch/arm/plat-mxc/include/mach/mx35.h
View File

@ -36,7 +36,7 @@
#define MX35_UART3_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x0c000)
#define MX35_CSPI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x10000)
#define MX35_SSI2_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x14000)
#define MX35_ATA_DMA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000)
#define MX35_ATA_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x20000)
#define MX35_MSHC1_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x24000)
#define MX35_FEC_BASE_ADDR 0x50038000
#define MX35_SPBA_CTRL_BASE_ADDR (MX35_SPBA0_BASE_ADDR + 0x3c000)

18
arch/arm/plat-mxc/include/mach/mx3x.h
View File

@ -187,22 +187,8 @@
/* Mandatory defines used globally */
#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)
extern unsigned int mx31_cpu_rev;
extern void mx31_read_cpu_rev(void);
static inline int mx31_revision(void)
{
return mx31_cpu_rev;
}
extern unsigned int mx35_cpu_rev;
extern void mx35_read_cpu_rev(void);
static inline int mx35_revision(void)
{
return mx35_cpu_rev;
}
extern int mx35_revision(void);
extern int mx31_revision(void);
#endif
#endif /* ifndef __MACH_MX3x_H__ */