sh-pfc: r8a7779: Add DU pin groups and functions
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Laurent Pinchart
parent
8b2810b957
commit
e8ebafdfea
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@ -1436,6 +1436,190 @@ static struct sh_pfc_pin pinmux_pins[] = {
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PINMUX_GPIO_GP_ALL(),
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};
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/* - DU0 -------------------------------------------------------------------- */
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static const unsigned int du0_rgb666_pins[] = {
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/* R[7:2], G[7:2], B[7:2] */
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188, 187, 186, 185, 184, 183,
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194, 193, 192, 191, 190, 189,
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200, 199, 198, 197, 196, 195,
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};
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static const unsigned int du0_rgb666_mux[] = {
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DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
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DU0_DR3_MARK, DU0_DR2_MARK,
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DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
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DU0_DG3_MARK, DU0_DG2_MARK,
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DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
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DU0_DB3_MARK, DU0_DB2_MARK,
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};
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static const unsigned int du0_rgb888_pins[] = {
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/* R[7:0], G[7:0], B[7:0] */
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188, 187, 186, 185, 184, 183, 24, 23,
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194, 193, 192, 191, 190, 189, 26, 25,
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200, 199, 198, 197, 196, 195, 28, 27,
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};
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static const unsigned int du0_rgb888_mux[] = {
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DU0_DR7_MARK, DU0_DR6_MARK, DU0_DR5_MARK, DU0_DR4_MARK,
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DU0_DR3_MARK, DU0_DR2_MARK, DU0_DR1_MARK, DU0_DR0_MARK,
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DU0_DG7_MARK, DU0_DG6_MARK, DU0_DG5_MARK, DU0_DG4_MARK,
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DU0_DG3_MARK, DU0_DG2_MARK, DU0_DG1_MARK, DU0_DG0_MARK,
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DU0_DB7_MARK, DU0_DB6_MARK, DU0_DB5_MARK, DU0_DB4_MARK,
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DU0_DB3_MARK, DU0_DB2_MARK, DU0_DB1_MARK, DU0_DB0_MARK,
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};
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static const unsigned int du0_clk_0_pins[] = {
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/* CLKIN, CLKOUT */
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29, 180,
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};
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static const unsigned int du0_clk_0_mux[] = {
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DU0_DOTCLKIN_MARK, DU0_DOTCLKOUT0_MARK,
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};
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static const unsigned int du0_clk_1_pins[] = {
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/* CLKIN, CLKOUT */
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29, 30,
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};
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static const unsigned int du0_clk_1_mux[] = {
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DU0_DOTCLKIN_MARK, DU0_DOTCLKOUT1_MARK,
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};
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static const unsigned int du0_sync_0_pins[] = {
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/* VSYNC, HSYNC, DISP */
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182, 181, 31,
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};
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static const unsigned int du0_sync_0_mux[] = {
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DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
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DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK
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};
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static const unsigned int du0_sync_1_pins[] = {
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/* VSYNC, HSYNC, DISP */
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182, 181, 32,
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};
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static const unsigned int du0_sync_1_mux[] = {
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DU0_EXHSYNC_DU0_HSYNC_MARK, DU0_EXVSYNC_DU0_VSYNC_MARK,
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DU0_DISP_MARK
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};
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static const unsigned int du0_oddf_pins[] = {
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/* ODDF */
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31,
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};
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static const unsigned int du0_oddf_mux[] = {
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DU0_EXODDF_DU0_ODDF_DISP_CDE_MARK
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};
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static const unsigned int du0_cde_pins[] = {
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/* CDE */
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33,
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};
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static const unsigned int du0_cde_mux[] = {
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DU0_CDE_MARK
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};
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/* - DU1 -------------------------------------------------------------------- */
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static const unsigned int du1_rgb666_pins[] = {
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/* R[7:2], G[7:2], B[7:2] */
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41, 40, 39, 38, 37, 36,
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49, 48, 47, 46, 45, 44,
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57, 56, 55, 54, 53, 52,
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};
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static const unsigned int du1_rgb666_mux[] = {
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DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
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DU1_DR3_MARK, DU1_DR2_MARK,
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DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK,
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DU1_DG3_MARK, DU1_DG2_MARK,
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DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK,
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DU1_DB3_MARK, DU1_DB2_MARK,
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};
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static const unsigned int du1_rgb888_pins[] = {
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/* R[7:0], G[7:0], B[7:0] */
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41, 40, 39, 38, 37, 36, 35, 34,
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49, 48, 47, 46, 45, 44, 43, 32,
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57, 56, 55, 54, 53, 52, 51, 50,
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};
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static const unsigned int du1_rgb888_mux[] = {
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DU1_DR7_MARK, DU1_DR6_MARK, DU1_DR5_MARK, DU1_DR4_MARK,
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DU1_DR3_MARK, DU1_DR2_MARK, DU1_DR1_MARK, DU1_DR0_MARK,
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DU1_DG7_MARK, DU1_DG6_MARK, DU1_DG5_MARK, DU1_DG4_MARK,
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DU1_DG3_MARK, DU1_DG2_MARK, DU1_DG1_MARK, DU1_DG0_MARK,
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DU1_DB7_MARK, DU1_DB6_MARK, DU1_DB5_MARK, DU1_DB4_MARK,
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DU1_DB3_MARK, DU1_DB2_MARK, DU1_DB1_MARK, DU1_DB0_MARK,
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};
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static const unsigned int du1_clk_pins[] = {
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/* CLKIN, CLKOUT */
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58, 59,
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};
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static const unsigned int du1_clk_mux[] = {
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DU1_DOTCLKIN_MARK, DU1_DOTCLKOUT_MARK,
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};
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static const unsigned int du1_sync_0_pins[] = {
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/* VSYNC, HSYNC, DISP */
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61, 60, 62,
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};
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static const unsigned int du1_sync_0_mux[] = {
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DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
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DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK
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};
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static const unsigned int du1_sync_1_pins[] = {
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/* VSYNC, HSYNC, DISP */
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61, 60, 63,
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};
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static const unsigned int du1_sync_1_mux[] = {
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DU1_EXVSYNC_DU1_VSYNC_MARK, DU1_EXHSYNC_DU1_HSYNC_MARK,
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DU1_DISP_MARK
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};
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static const unsigned int du1_oddf_pins[] = {
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/* ODDF */
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62,
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};
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static const unsigned int du1_oddf_mux[] = {
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DU1_EXODDF_DU1_ODDF_DISP_CDE_MARK
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};
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static const unsigned int du1_cde_pins[] = {
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/* CDE */
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64,
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};
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static const unsigned int du1_cde_mux[] = {
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DU1_CDE_MARK
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};
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static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(du0_rgb666),
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SH_PFC_PIN_GROUP(du0_rgb888),
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SH_PFC_PIN_GROUP(du0_clk_0),
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SH_PFC_PIN_GROUP(du0_clk_1),
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SH_PFC_PIN_GROUP(du0_sync_0),
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SH_PFC_PIN_GROUP(du0_sync_1),
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SH_PFC_PIN_GROUP(du0_oddf),
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SH_PFC_PIN_GROUP(du0_cde),
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SH_PFC_PIN_GROUP(du1_rgb666),
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SH_PFC_PIN_GROUP(du1_rgb888),
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SH_PFC_PIN_GROUP(du1_clk),
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SH_PFC_PIN_GROUP(du1_sync_0),
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SH_PFC_PIN_GROUP(du1_sync_1),
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SH_PFC_PIN_GROUP(du1_oddf),
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SH_PFC_PIN_GROUP(du1_cde),
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};
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static const char * const du0_groups[] = {
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"du0_rgb666",
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"du0_rgb888",
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"du0_clk_0",
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"du0_clk_1",
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"du0_sync_0",
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"du0_sync_1",
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"du0_oddf",
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"du0_cde",
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};
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static const char * const du1_groups[] = {
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"du1_rgb666",
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"du1_rgb888",
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"du1_clk",
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"du1_sync_0",
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"du1_sync_1",
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"du1_oddf",
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"du1_cde",
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};
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static const struct sh_pfc_function pinmux_functions[] = {
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SH_PFC_FUNCTION(du0),
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SH_PFC_FUNCTION(du1),
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};
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#define PINMUX_FN_BASE ARRAY_SIZE(pinmux_pins)
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static const struct pinmux_func pinmux_func_gpios[] = {
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@ -1494,79 +1678,79 @@ static const struct pinmux_func pinmux_func_gpios[] = {
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GPIO_FN(CC5_OSCOUT), GPIO_FN(HRTS0), GPIO_FN(RTS1_TANS),
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GPIO_FN(MDATA), GPIO_FN(TX0_C), GPIO_FN(SUB_TMS), GPIO_FN(CC5_STATE1),
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GPIO_FN(CC5_STATE9), GPIO_FN(CC5_STATE17), GPIO_FN(CC5_STATE25),
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GPIO_FN(CC5_STATE33), GPIO_FN(DU0_DR0), GPIO_FN(LCDOUT0),
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GPIO_FN(CC5_STATE33), GPIO_FN(LCDOUT0),
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GPIO_FN(DREQ0), GPIO_FN(GPS_CLK_B), GPIO_FN(AUDATA0),
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GPIO_FN(TX5_C), GPIO_FN(DU0_DR1), GPIO_FN(LCDOUT1), GPIO_FN(DACK0),
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GPIO_FN(TX5_C), GPIO_FN(LCDOUT1), GPIO_FN(DACK0),
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GPIO_FN(DRACK0), GPIO_FN(GPS_SIGN_B), GPIO_FN(AUDATA1), GPIO_FN(RX5_C),
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GPIO_FN(DU0_DR2), GPIO_FN(LCDOUT2), GPIO_FN(DU0_DR3), GPIO_FN(LCDOUT3),
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GPIO_FN(DU0_DR4), GPIO_FN(LCDOUT4), GPIO_FN(DU0_DR5), GPIO_FN(LCDOUT5),
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GPIO_FN(DU0_DR6), GPIO_FN(LCDOUT6), GPIO_FN(DU0_DR7), GPIO_FN(LCDOUT7),
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GPIO_FN(DU0_DG0), GPIO_FN(LCDOUT8), GPIO_FN(DREQ1), GPIO_FN(SCL2),
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GPIO_FN(LCDOUT2), GPIO_FN(LCDOUT3),
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GPIO_FN(LCDOUT4), GPIO_FN(LCDOUT5),
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GPIO_FN(LCDOUT6), GPIO_FN(LCDOUT7),
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GPIO_FN(LCDOUT8), GPIO_FN(DREQ1), GPIO_FN(SCL2),
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GPIO_FN(AUDATA2),
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/* IPSR3 */
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GPIO_FN(DU0_DG1), GPIO_FN(LCDOUT9), GPIO_FN(DACK1), GPIO_FN(SDA2),
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GPIO_FN(AUDATA3), GPIO_FN(DU0_DG2), GPIO_FN(LCDOUT10),
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GPIO_FN(DU0_DG3), GPIO_FN(LCDOUT11), GPIO_FN(DU0_DG4),
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GPIO_FN(LCDOUT12), GPIO_FN(DU0_DG5), GPIO_FN(LCDOUT13),
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GPIO_FN(DU0_DG6), GPIO_FN(LCDOUT14), GPIO_FN(DU0_DG7),
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GPIO_FN(LCDOUT15), GPIO_FN(DU0_DB0), GPIO_FN(LCDOUT16),
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GPIO_FN(LCDOUT9), GPIO_FN(DACK1), GPIO_FN(SDA2),
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GPIO_FN(AUDATA3), GPIO_FN(LCDOUT10),
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GPIO_FN(LCDOUT11),
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GPIO_FN(LCDOUT12), GPIO_FN(LCDOUT13),
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GPIO_FN(LCDOUT14),
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GPIO_FN(LCDOUT15), GPIO_FN(LCDOUT16),
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GPIO_FN(EX_WAIT1), GPIO_FN(SCL1), GPIO_FN(TCLK1), GPIO_FN(AUDATA4),
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GPIO_FN(DU0_DB1), GPIO_FN(LCDOUT17), GPIO_FN(EX_WAIT2), GPIO_FN(SDA1),
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GPIO_FN(LCDOUT17), GPIO_FN(EX_WAIT2), GPIO_FN(SDA1),
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GPIO_FN(GPS_MAG_B), GPIO_FN(AUDATA5), GPIO_FN(SCK5_C),
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GPIO_FN(DU0_DB2), GPIO_FN(LCDOUT18), GPIO_FN(DU0_DB3),
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GPIO_FN(LCDOUT19), GPIO_FN(DU0_DB4), GPIO_FN(LCDOUT20),
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GPIO_FN(DU0_DB5), GPIO_FN(LCDOUT21), GPIO_FN(DU0_DB6),
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GPIO_FN(LCDOUT22), GPIO_FN(DU0_DB7), GPIO_FN(LCDOUT23),
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GPIO_FN(DU0_DOTCLKIN), GPIO_FN(QSTVA_QVS), GPIO_FN(TX3_D_IRDA_TX_D),
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GPIO_FN(SCL3_B), GPIO_FN(DU0_DOTCLKOUT0), GPIO_FN(QCLK),
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GPIO_FN(DU0_DOTCLKOUT1), GPIO_FN(QSTVB_QVE), GPIO_FN(RX3_D_IRDA_RX_D),
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GPIO_FN(LCDOUT18),
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GPIO_FN(LCDOUT19), GPIO_FN(LCDOUT20),
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GPIO_FN(LCDOUT21),
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GPIO_FN(LCDOUT22), GPIO_FN(LCDOUT23),
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GPIO_FN(QSTVA_QVS), GPIO_FN(TX3_D_IRDA_TX_D),
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GPIO_FN(SCL3_B), GPIO_FN(QCLK),
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GPIO_FN(QSTVB_QVE), GPIO_FN(RX3_D_IRDA_RX_D),
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GPIO_FN(SDA3_B), GPIO_FN(SDA2_C), GPIO_FN(DACK0_B), GPIO_FN(DRACK0_B),
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GPIO_FN(DU0_EXHSYNC_DU0_HSYNC), GPIO_FN(QSTH_QHS),
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GPIO_FN(DU0_EXVSYNC_DU0_VSYNC), GPIO_FN(QSTB_QHE),
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GPIO_FN(DU0_EXODDF_DU0_ODDF_DISP_CDE), GPIO_FN(QCPV_QDE),
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GPIO_FN(QSTH_QHS),
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GPIO_FN(QSTB_QHE),
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GPIO_FN(QCPV_QDE),
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GPIO_FN(CAN1_TX), GPIO_FN(TX2_C), GPIO_FN(SCL2_C), GPIO_FN(REMOCON),
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/* IPSR4 */
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GPIO_FN(DU0_DISP), GPIO_FN(QPOLA), GPIO_FN(CAN_CLK_C), GPIO_FN(SCK2_C),
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GPIO_FN(DU0_CDE), GPIO_FN(QPOLB), GPIO_FN(CAN1_RX), GPIO_FN(RX2_C),
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GPIO_FN(QPOLA), GPIO_FN(CAN_CLK_C), GPIO_FN(SCK2_C),
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GPIO_FN(QPOLB), GPIO_FN(CAN1_RX), GPIO_FN(RX2_C),
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GPIO_FN(DREQ0_B), GPIO_FN(SSI_SCK78_B), GPIO_FN(SCK0_B),
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GPIO_FN(DU1_DR0), GPIO_FN(VI2_DATA0_VI2_B0), GPIO_FN(PWM6),
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GPIO_FN(VI2_DATA0_VI2_B0), GPIO_FN(PWM6),
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GPIO_FN(SD3_CLK), GPIO_FN(TX3_E_IRDA_TX_E), GPIO_FN(AUDCK),
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GPIO_FN(PWMFSW0_B), GPIO_FN(DU1_DR1), GPIO_FN(VI2_DATA1_VI2_B1),
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GPIO_FN(PWMFSW0_B), GPIO_FN(VI2_DATA1_VI2_B1),
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GPIO_FN(PWM0), GPIO_FN(SD3_CMD), GPIO_FN(RX3_E_IRDA_RX_E),
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GPIO_FN(AUDSYNC), GPIO_FN(CTS0_D), GPIO_FN(DU1_DR2), GPIO_FN(VI2_G0),
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GPIO_FN(DU1_DR3), GPIO_FN(VI2_G1), GPIO_FN(DU1_DR4), GPIO_FN(VI2_G2),
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GPIO_FN(DU1_DR5), GPIO_FN(VI2_G3), GPIO_FN(DU1_DR6), GPIO_FN(VI2_G4),
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GPIO_FN(DU1_DR7), GPIO_FN(VI2_G5), GPIO_FN(DU1_DG0),
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GPIO_FN(AUDSYNC), GPIO_FN(CTS0_D), GPIO_FN(VI2_G0),
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GPIO_FN(VI2_G1), GPIO_FN(VI2_G2),
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GPIO_FN(VI2_G3), GPIO_FN(VI2_G4),
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GPIO_FN(VI2_G5),
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GPIO_FN(VI2_DATA2_VI2_B2), GPIO_FN(SCL1_B), GPIO_FN(SD3_DAT2),
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GPIO_FN(SCK3_E), GPIO_FN(AUDATA6), GPIO_FN(TX0_D), GPIO_FN(DU1_DG1),
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GPIO_FN(SCK3_E), GPIO_FN(AUDATA6), GPIO_FN(TX0_D),
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GPIO_FN(VI2_DATA3_VI2_B3), GPIO_FN(SDA1_B), GPIO_FN(SD3_DAT3),
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GPIO_FN(SCK5), GPIO_FN(AUDATA7), GPIO_FN(RX0_D), GPIO_FN(DU1_DG2),
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GPIO_FN(VI2_G6), GPIO_FN(DU1_DG3), GPIO_FN(VI2_G7), GPIO_FN(DU1_DG4),
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GPIO_FN(VI2_R0), GPIO_FN(DU1_DG5), GPIO_FN(VI2_R1), GPIO_FN(DU1_DG6),
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GPIO_FN(VI2_R2), GPIO_FN(DU1_DG7), GPIO_FN(VI2_R3), GPIO_FN(DU1_DB0),
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GPIO_FN(SCK5), GPIO_FN(AUDATA7), GPIO_FN(RX0_D),
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GPIO_FN(VI2_G6), GPIO_FN(VI2_G7),
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GPIO_FN(VI2_R0), GPIO_FN(VI2_R1),
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GPIO_FN(VI2_R2), GPIO_FN(VI2_R3),
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GPIO_FN(VI2_DATA4_VI2_B4), GPIO_FN(SCL2_B), GPIO_FN(SD3_DAT0),
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GPIO_FN(TX5), GPIO_FN(SCK0_D),
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/* IPSR5 */
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GPIO_FN(DU1_DB1), GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(SDA2_B),
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GPIO_FN(VI2_DATA5_VI2_B5), GPIO_FN(SDA2_B),
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GPIO_FN(SD3_DAT1), GPIO_FN(RX5), GPIO_FN(RTS0_D_TANS_D),
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GPIO_FN(DU1_DB2), GPIO_FN(VI2_R4), GPIO_FN(DU1_DB3), GPIO_FN(VI2_R5),
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GPIO_FN(DU1_DB4), GPIO_FN(VI2_R6), GPIO_FN(DU1_DB5), GPIO_FN(VI2_R7),
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GPIO_FN(DU1_DB6), GPIO_FN(SCL2_D), GPIO_FN(DU1_DB7), GPIO_FN(SDA2_D),
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GPIO_FN(DU1_DOTCLKIN), GPIO_FN(VI2_CLKENB), GPIO_FN(HSPI_CS1),
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GPIO_FN(SCL1_D), GPIO_FN(DU1_DOTCLKOUT), GPIO_FN(VI2_FIELD),
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GPIO_FN(SDA1_D), GPIO_FN(DU1_EXHSYNC_DU1_HSYNC), GPIO_FN(VI2_HSYNC),
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GPIO_FN(VI3_HSYNC), GPIO_FN(DU1_EXVSYNC_DU1_VSYNC), GPIO_FN(VI2_VSYNC),
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GPIO_FN(VI3_VSYNC), GPIO_FN(DU1_EXODDF_DU1_ODDF_DISP_CDE),
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GPIO_FN(VI2_R4), GPIO_FN(VI2_R5),
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GPIO_FN(VI2_R6), GPIO_FN(VI2_R7),
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GPIO_FN(SCL2_D), GPIO_FN(SDA2_D),
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GPIO_FN(VI2_CLKENB), GPIO_FN(HSPI_CS1),
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GPIO_FN(SCL1_D), GPIO_FN(VI2_FIELD),
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GPIO_FN(SDA1_D), GPIO_FN(VI2_HSYNC),
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||||
GPIO_FN(VI3_HSYNC), GPIO_FN(VI2_VSYNC),
|
||||
GPIO_FN(VI3_VSYNC),
|
||||
GPIO_FN(VI2_CLK), GPIO_FN(TX3_B_IRDA_TX_B), GPIO_FN(SD3_CD),
|
||||
GPIO_FN(HSPI_TX1), GPIO_FN(VI1_CLKENB), GPIO_FN(VI3_CLKENB),
|
||||
GPIO_FN(AUDIO_CLKC), GPIO_FN(TX2_D), GPIO_FN(SPEEDIN),
|
||||
GPIO_FN(GPS_SIGN_D), GPIO_FN(DU1_DISP), GPIO_FN(VI2_DATA6_VI2_B6),
|
||||
GPIO_FN(GPS_SIGN_D), GPIO_FN(VI2_DATA6_VI2_B6),
|
||||
GPIO_FN(TCLK0), GPIO_FN(QSTVA_B_QVS_B), GPIO_FN(HSPI_CLK1),
|
||||
GPIO_FN(SCK2_D), GPIO_FN(AUDIO_CLKOUT_B), GPIO_FN(GPS_MAG_D),
|
||||
GPIO_FN(DU1_CDE), GPIO_FN(VI2_DATA7_VI2_B7), GPIO_FN(RX3_B_IRDA_RX_B),
|
||||
GPIO_FN(VI2_DATA7_VI2_B7), GPIO_FN(RX3_B_IRDA_RX_B),
|
||||
GPIO_FN(SD3_WP), GPIO_FN(HSPI_RX1), GPIO_FN(VI1_FIELD),
|
||||
GPIO_FN(VI3_FIELD), GPIO_FN(AUDIO_CLKOUT), GPIO_FN(RX2_D),
|
||||
GPIO_FN(GPS_CLK_C), GPIO_FN(GPS_CLK_D), GPIO_FN(AUDIO_CLKA),
|
||||
|
|
@ -2598,6 +2782,11 @@ const struct sh_pfc_soc_info r8a7779_pinmux_info = {
|
|||
|
||||
.pins = pinmux_pins,
|
||||
.nr_pins = ARRAY_SIZE(pinmux_pins),
|
||||
.groups = pinmux_groups,
|
||||
.nr_groups = ARRAY_SIZE(pinmux_groups),
|
||||
.functions = pinmux_functions,
|
||||
.nr_functions = ARRAY_SIZE(pinmux_functions),
|
||||
|
||||
.func_gpios = pinmux_func_gpios,
|
||||
.nr_func_gpios = ARRAY_SIZE(pinmux_func_gpios),
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue