drm/amdgpu: enable VCN3.0 PG and CG for Sienna_Cichlid

By setting up the flags to the ASIC

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Leo Liu 2019-12-03 09:18:51 -05:00 committed by Alex Deucher
parent fedac0155a
commit e823be13db
1 changed files with 2 additions and 2 deletions

View File

@ -710,8 +710,8 @@ static int nv_common_early_init(void *handle)
adev->external_rev_id = adev->rev_id + 0xa;
break;
case CHIP_SIENNA_CICHLID:
adev->cg_flags = 0;
adev->pg_flags = 0;
adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
adev->pg_flags = AMD_PG_SUPPORT_VCN;
adev->external_rev_id = adev->rev_id + 0x28;
break;
default: