drm/amdgpu: enable VCN3.0 PG and CG for Sienna_Cichlid
By setting up the flags to the ASIC Signed-off-by: Leo Liu <leo.liu@amd.com> Reviewed-by: James Zhu <James.Zhu@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -710,8 +710,8 @@ static int nv_common_early_init(void *handle)
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adev->external_rev_id = adev->rev_id + 0xa;
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break;
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case CHIP_SIENNA_CICHLID:
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adev->cg_flags = 0;
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adev->pg_flags = 0;
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adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
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adev->pg_flags = AMD_PG_SUPPORT_VCN;
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adev->external_rev_id = adev->rev_id + 0x28;
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break;
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default:
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