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dmaengine: dw-axi-dmac: cleanup comments 

For spdx, /* */ for *.h, remove extra space

Replacements
configurarion to configuration
inerrupts to interrupts
chanels to channels

Signed-off-by: Tom Rix <trix@redhat.com>
Link: https://lore.kernel.org/r/20220309020056.1026106-1-trix@redhat.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Tom Rix 2022-03-08 18:00:56 -08:00 committed by Vinod Koul
parent a0754cf3b3
commit e7c7a0161b
2 changed files with 5 additions and 5 deletions
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8
drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c
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@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
// SPDX-License-Identifier: GPL-2.0
// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
/*
@ -35,7 +35,7 @@
/*
* The set of bus widths supported by the DMA controller. DW AXI DMAC supports
* master data bus width up to 512 bits (for both AXI master interfaces), but
* it depends on IP block configurarion.
* it depends on IP block configuration.
*/
#define AXI_DMA_BUSWIDTHS \
(DMA_SLAVE_BUSWIDTH_1_BYTE | \
@ -1089,10 +1089,10 @@ static irqreturn_t dw_axi_dma_interrupt(int irq, void *dev_id)
u32 status, i;
/* Disable DMAC inerrupts. We'll enable them after processing chanels */
/* Disable DMAC interrupts. We'll enable them after processing channels */
axi_dma_irq_disable(chip);
/* Poll, clear and process every chanel interrupt status */
/* Poll, clear and process every channel interrupt status */
for (i = 0; i < dw->hdata->nr_channels; i++) {
chan = &dw->chan[i];
status = axi_chan_irq_read(chan);

2
drivers/dma/dw-axi-dmac/dw-axi-dmac.h
View File

@ -1,4 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
/* SPDX-License-Identifier: GPL-2.0 */
// (C) 2017-2018 Synopsys, Inc. (www.synopsys.com)
/*