iio: adc: max1027: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA
on platforms with 128 byte cachelines above L1. Switch to the updated
IIO_DMA_MINALIGN definition.
Fixes: fc167f6248
("iio: add support of the max1027")
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20220508175712.647246-24-jic23@kernel.org
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@ -272,7 +272,7 @@ struct max1027_state {
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struct mutex lock;
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struct completion complete;
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u8 reg ____cacheline_aligned;
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u8 reg __aligned(IIO_DMA_MINALIGN);
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};
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static int max1027_wait_eoc(struct iio_dev *indio_dev)
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