powerpc/dma: remove the iommu fallback for coherent allocations
All iommu capable platforms now always use the iommu code with the internal bypass, so there is not need for this magic anymore. Signed-off-by: Christoph Hellwig <hch@lst.de> Tested-by: Christian Zigotzky <chzigotzky@xenosoft.de> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -119,9 +119,6 @@ config GENERIC_HWEIGHT
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bool
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default y
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config ARCH_HAS_DMA_SET_COHERENT_MASK
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bool
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config PPC
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bool
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default y
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@ -130,7 +127,6 @@ config PPC
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#
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_SET_COHERENT_MASK
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FORTIFY_SOURCE
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select ARCH_HAS_GCOV_PROFILE_ALL
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@ -115,51 +115,6 @@ void __dma_nommu_free_coherent(struct device *dev, size_t size,
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}
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#endif /* !CONFIG_NOT_COHERENT_CACHE */
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static void *dma_nommu_alloc_coherent(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flag,
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unsigned long attrs)
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{
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struct iommu_table *iommu;
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/* The coherent mask may be smaller than the real mask, check if
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* we can really use the direct ops
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*/
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if (dma_nommu_dma_supported(dev, dev->coherent_dma_mask))
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return __dma_nommu_alloc_coherent(dev, size, dma_handle,
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flag, attrs);
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/* Ok we can't ... do we have an iommu ? If not, fail */
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iommu = get_iommu_table_base(dev);
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if (!iommu)
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return NULL;
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/* Try to use the iommu */
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return iommu_alloc_coherent(dev, iommu, size, dma_handle,
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dev->coherent_dma_mask, flag,
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dev_to_node(dev));
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}
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static void dma_nommu_free_coherent(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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unsigned long attrs)
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{
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struct iommu_table *iommu;
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/* See comments in dma_nommu_alloc_coherent() */
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if (dma_nommu_dma_supported(dev, dev->coherent_dma_mask))
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return __dma_nommu_free_coherent(dev, size, vaddr, dma_handle,
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attrs);
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/* Maybe we used an iommu ... */
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iommu = get_iommu_table_base(dev);
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/* If we hit that we should have never allocated in the first
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* place so how come we are freeing ?
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*/
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if (WARN_ON(!iommu))
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return;
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iommu_free_coherent(iommu, size, vaddr, dma_handle);
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}
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int dma_nommu_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t handle, size_t size,
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unsigned long attrs)
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@ -262,8 +217,8 @@ static inline void dma_nommu_sync_single(struct device *dev,
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#endif
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const struct dma_map_ops dma_nommu_ops = {
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.alloc = dma_nommu_alloc_coherent,
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.free = dma_nommu_free_coherent,
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.alloc = __dma_nommu_alloc_coherent,
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.free = __dma_nommu_free_coherent,
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.mmap = dma_nommu_mmap_coherent,
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.map_sg = dma_nommu_map_sg,
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.unmap_sg = dma_nommu_unmap_sg,
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@ -280,25 +235,6 @@ const struct dma_map_ops dma_nommu_ops = {
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};
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EXPORT_SYMBOL(dma_nommu_ops);
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int dma_set_coherent_mask(struct device *dev, u64 mask)
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{
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if (!dma_supported(dev, mask)) {
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/*
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* We need to special case the direct DMA ops which can
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* support a fallback for coherent allocations. There
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* is no dma_op->set_coherent_mask() so we have to do
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* things the hard way:
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*/
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if (get_dma_ops(dev) != &dma_nommu_ops ||
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get_iommu_table_base(dev) == NULL ||
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!dma_iommu_dma_supported(dev, mask))
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return -EIO;
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}
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dev->coherent_dma_mask = mask;
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return 0;
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}
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EXPORT_SYMBOL(dma_set_coherent_mask);
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int dma_set_mask(struct device *dev, u64 dma_mask)
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{
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if (ppc_md.dma_set_mask)
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