drm/amd/display: initialize YUV plane capabilities
This patch populates the YUV surface configurations. Tests: (On Chromium OS for Stoney Only) builds without any errors. Signed-off-by: Shirish S <shirish.s@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Reviewed-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -462,9 +462,6 @@ static void fill_plane_attributes_from_fb(
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&tiling_flags,
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addReq == true ? &fb_location:NULL);
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surface->address.type = PLN_ADDR_TYPE_GRAPHICS;
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surface->address.grph.addr.low_part = lower_32_bits(fb_location);
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surface->address.grph.addr.high_part = upper_32_bits(fb_location);
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switch (fb->format->format) {
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case DRM_FORMAT_C8:
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@ -485,12 +482,55 @@ static void fill_plane_attributes_from_fb(
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case DRM_FORMAT_ABGR2101010:
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surface->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010;
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break;
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case DRM_FORMAT_YUV420:
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surface->format = SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr;
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break;
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case DRM_FORMAT_YVU420:
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surface->format = SURFACE_PIXEL_FORMAT_VIDEO_420_YCrCb;
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break;
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default:
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DRM_ERROR("Unsupported screen format %s\n",
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drm_get_format_name(fb->format->format, &format_name));
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return;
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}
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if (surface->format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN) {
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surface->address.type = PLN_ADDR_TYPE_GRAPHICS;
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surface->address.grph.addr.low_part = lower_32_bits(fb_location);
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surface->address.grph.addr.high_part = upper_32_bits(fb_location);
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surface->plane_size.grph.surface_size.x = 0;
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surface->plane_size.grph.surface_size.y = 0;
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surface->plane_size.grph.surface_size.width = fb->width;
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surface->plane_size.grph.surface_size.height = fb->height;
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surface->plane_size.grph.surface_pitch =
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fb->pitches[0] / fb->format->cpp[0];
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/* TODO: unhardcode */
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surface->color_space = COLOR_SPACE_SRGB;
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} else {
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surface->address.type = PLN_ADDR_TYPE_VIDEO_PROGRESSIVE;
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surface->address.video_progressive.luma_addr.low_part
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= lower_32_bits(fb_location);
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surface->address.video_progressive.chroma_addr.high_part
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= upper_32_bits(fb_location);
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surface->plane_size.video.luma_size.x = 0;
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surface->plane_size.video.luma_size.y = 0;
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surface->plane_size.video.luma_size.width = fb->width;
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surface->plane_size.video.luma_size.height = fb->height;
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/* TODO: unhardcode */
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surface->plane_size.video.luma_pitch = fb->pitches[0] / 4;
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surface->plane_size.video.chroma_size.x = 0;
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surface->plane_size.video.chroma_size.y = 0;
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surface->plane_size.video.chroma_size.width = fb->width;
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surface->plane_size.video.chroma_size.height = fb->height;
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surface->plane_size.video.chroma_pitch =
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fb->pitches[0] / 4;
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/* TODO: unhardcode */
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surface->color_space = COLOR_SPACE_YCBCR709;
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}
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memset(&surface->tiling_info, 0, sizeof(surface->tiling_info));
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/* Fill GFX params */
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@ -541,20 +581,10 @@ static void fill_plane_attributes_from_fb(
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surface->tiling_info.gfx9.shaderEnable = 1;
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}
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surface->plane_size.grph.surface_size.x = 0;
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surface->plane_size.grph.surface_size.y = 0;
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surface->plane_size.grph.surface_size.width = fb->width;
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surface->plane_size.grph.surface_size.height = fb->height;
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surface->plane_size.grph.surface_pitch =
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fb->pitches[0] / fb->format->cpp[0];
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surface->visible = true;
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surface->scaling_quality.h_taps_c = 0;
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surface->scaling_quality.v_taps_c = 0;
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/* TODO: unhardcode */
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surface->color_space = COLOR_SPACE_SRGB;
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/* is this needed? is surface zeroed at allocation? */
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surface->scaling_quality.h_taps = 0;
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surface->scaling_quality.v_taps = 0;
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@ -1670,10 +1700,8 @@ static uint32_t rgb_formats[] = {
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};
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static uint32_t yuv_formats[] = {
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DRM_FORMAT_YUYV,
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DRM_FORMAT_YVYU,
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DRM_FORMAT_UYVY,
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DRM_FORMAT_VYUY,
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DRM_FORMAT_YUV420,
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DRM_FORMAT_YVU420,
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};
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int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
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