drm/nouveau/platform: make VDD regulator optional
GP10B's power is managed by generic PM domains, so it does not require a VDD regulator. Add this option into the chip function structure. Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
51751f7db0
commit
e6e1817a55
|
@ -42,6 +42,10 @@ struct nvkm_device_tegra_func {
|
||||||
* Whether the chip requires a reference clock
|
* Whether the chip requires a reference clock
|
||||||
*/
|
*/
|
||||||
bool require_ref_clk;
|
bool require_ref_clk;
|
||||||
|
/*
|
||||||
|
* Whether the chip requires the VDD regulator
|
||||||
|
*/
|
||||||
|
bool require_vdd;
|
||||||
};
|
};
|
||||||
|
|
||||||
int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *,
|
int nvkm_device_tegra_new(const struct nvkm_device_tegra_func *,
|
||||||
|
|
|
@ -53,10 +53,12 @@ static int nouveau_platform_remove(struct platform_device *pdev)
|
||||||
#if IS_ENABLED(CONFIG_OF)
|
#if IS_ENABLED(CONFIG_OF)
|
||||||
static const struct nvkm_device_tegra_func gk20a_platform_data = {
|
static const struct nvkm_device_tegra_func gk20a_platform_data = {
|
||||||
.iommu_bit = 34,
|
.iommu_bit = 34,
|
||||||
|
.require_vdd = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
static const struct nvkm_device_tegra_func gm20b_platform_data = {
|
static const struct nvkm_device_tegra_func gm20b_platform_data = {
|
||||||
.iommu_bit = 34,
|
.iommu_bit = 34,
|
||||||
|
.require_vdd = true,
|
||||||
.require_ref_clk = true,
|
.require_ref_clk = true,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
@ -28,9 +28,11 @@ nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = regulator_enable(tdev->vdd);
|
if (tdev->vdd) {
|
||||||
if (ret)
|
ret = regulator_enable(tdev->vdd);
|
||||||
goto err_power;
|
if (ret)
|
||||||
|
goto err_power;
|
||||||
|
}
|
||||||
|
|
||||||
ret = clk_prepare_enable(tdev->clk);
|
ret = clk_prepare_enable(tdev->clk);
|
||||||
if (ret)
|
if (ret)
|
||||||
|
@ -67,7 +69,8 @@ err_clk_pwr:
|
||||||
err_clk_ref:
|
err_clk_ref:
|
||||||
clk_disable_unprepare(tdev->clk);
|
clk_disable_unprepare(tdev->clk);
|
||||||
err_clk:
|
err_clk:
|
||||||
regulator_disable(tdev->vdd);
|
if (tdev->vdd)
|
||||||
|
regulator_disable(tdev->vdd);
|
||||||
err_power:
|
err_power:
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -75,6 +78,8 @@ err_power:
|
||||||
static int
|
static int
|
||||||
nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
|
nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
|
||||||
{
|
{
|
||||||
|
int ret;
|
||||||
|
|
||||||
reset_control_assert(tdev->rst);
|
reset_control_assert(tdev->rst);
|
||||||
udelay(10);
|
udelay(10);
|
||||||
|
|
||||||
|
@ -84,7 +89,13 @@ nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
|
||||||
clk_disable_unprepare(tdev->clk);
|
clk_disable_unprepare(tdev->clk);
|
||||||
udelay(10);
|
udelay(10);
|
||||||
|
|
||||||
return regulator_disable(tdev->vdd);
|
if (tdev->vdd) {
|
||||||
|
ret = regulator_disable(tdev->vdd);
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
|
@ -264,10 +275,12 @@ nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
|
||||||
tdev->func = func;
|
tdev->func = func;
|
||||||
tdev->pdev = pdev;
|
tdev->pdev = pdev;
|
||||||
|
|
||||||
tdev->vdd = devm_regulator_get(&pdev->dev, "vdd");
|
if (func->require_vdd) {
|
||||||
if (IS_ERR(tdev->vdd)) {
|
tdev->vdd = devm_regulator_get(&pdev->dev, "vdd");
|
||||||
ret = PTR_ERR(tdev->vdd);
|
if (IS_ERR(tdev->vdd)) {
|
||||||
goto free;
|
ret = PTR_ERR(tdev->vdd);
|
||||||
|
goto free;
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
|
tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
|
||||||
|
|
Loading…
Reference in New Issue