USB: omap_udc build fixes (sync with linux-omap)
Resync the omap_udc driver with the latest from the Linux-OMAP tree. Changes include DMA API updates (it builds again!), clock/pm updates, minor bugfixes, whitespace. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
parent
6a3c3d4952
commit
e6a6e472f5
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@ -42,6 +42,7 @@
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#include <linux/usb_gadget.h>
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#include <linux/usb/otg.h>
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#include <linux/dma-mapping.h>
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#include <linux/clk.h>
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#include <asm/byteorder.h>
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#include <asm/io.h>
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@ -60,6 +61,11 @@
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/* bulk DMA seems to be behaving for both IN and OUT */
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#define USE_DMA
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/* FIXME: OMAP2 currently has some problem in DMA mode */
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#ifdef CONFIG_ARCH_OMAP2
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#undef USE_DMA
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#endif
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/* ISO too */
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#define USE_ISO
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@ -99,7 +105,7 @@ static unsigned fifo_mode = 0;
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* boot parameter "omap_udc:fifo_mode=42"
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*/
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module_param (fifo_mode, uint, 0);
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MODULE_PARM_DESC (fifo_mode, "endpoint setup (0 == default)");
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MODULE_PARM_DESC (fifo_mode, "endpoint configuration");
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#ifdef USE_DMA
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static unsigned use_dma = 1;
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@ -122,7 +128,7 @@ static const char driver_desc [] = DRIVER_DESC;
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/*-------------------------------------------------------------------------*/
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/* there's a notion of "current endpoint" for modifying endpoint
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* state, and PIO access to its FIFO.
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* state, and PIO access to its FIFO.
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*/
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static void use_ep(struct omap_ep *ep, u16 select)
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@ -391,7 +397,7 @@ done(struct omap_ep *ep, struct omap_req *req, int status)
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#define FIFO_EMPTY (UDC_NON_ISO_FIFO_EMPTY | UDC_ISO_FIFO_EMPTY)
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#define FIFO_UNREADABLE (UDC_EP_HALTED | FIFO_EMPTY)
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static inline int
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static inline int
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write_packet(u8 *buf, struct omap_req *req, unsigned max)
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{
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unsigned len;
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@ -456,7 +462,7 @@ static int write_fifo(struct omap_ep *ep, struct omap_req *req)
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return is_last;
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}
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static inline int
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static inline int
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read_packet(u8 *buf, struct omap_req *req, unsigned avail)
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{
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unsigned len;
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@ -542,9 +548,9 @@ static inline dma_addr_t dma_csac(unsigned lch)
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/* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
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* read before the DMA controller finished disabling the channel.
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*/
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csac = omap_readw(OMAP_DMA_CSAC(lch));
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csac = OMAP_DMA_CSAC_REG(lch);
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if (csac == 0)
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csac = omap_readw(OMAP_DMA_CSAC(lch));
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csac = OMAP_DMA_CSAC_REG(lch);
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return csac;
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}
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@ -555,9 +561,9 @@ static inline dma_addr_t dma_cdac(unsigned lch)
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/* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is
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* read before the DMA controller finished disabling the channel.
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*/
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cdac = omap_readw(OMAP_DMA_CDAC(lch));
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cdac = OMAP_DMA_CDAC_REG(lch);
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if (cdac == 0)
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cdac = omap_readw(OMAP_DMA_CDAC(lch));
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cdac = OMAP_DMA_CDAC_REG(lch);
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return cdac;
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}
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@ -582,7 +588,7 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start)
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}
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#define DMA_DEST_LAST(x) (cpu_is_omap15xx() \
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? omap_readw(OMAP_DMA_CSAC(x)) /* really: CPC */ \
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? OMAP_DMA_CSAC_REG(x) /* really: CPC */ \
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: dma_cdac(x))
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static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start)
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@ -620,17 +626,19 @@ static void next_in_dma(struct omap_ep *ep, struct omap_req *req)
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|| (cpu_is_omap15xx() && length < ep->maxpacket)) {
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txdma_ctrl = UDC_TXN_EOT | length;
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omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S8,
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length, 1, sync_mode);
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length, 1, sync_mode, 0, 0);
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} else {
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length = min(length / ep->maxpacket,
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(unsigned) UDC_TXN_TSC + 1);
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txdma_ctrl = length;
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txdma_ctrl = length;
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omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
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ep->ep.maxpacket >> 1, length, sync_mode);
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ep->ep.maxpacket >> 1, length, sync_mode,
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0, 0);
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length *= ep->maxpacket;
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}
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omap_set_dma_src_params(ep->lch, OMAP_DMA_PORT_EMIFF,
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OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
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OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
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0, 0);
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omap_start_dma(ep->lch);
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ep->dma_counter = dma_csac(ep->lch);
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@ -675,9 +683,11 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req)
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req->dma_bytes = packets * ep->ep.maxpacket;
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omap_set_dma_transfer_params(ep->lch, OMAP_DMA_DATA_TYPE_S16,
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ep->ep.maxpacket >> 1, packets,
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OMAP_DMA_SYNC_ELEMENT);
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OMAP_DMA_SYNC_ELEMENT,
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0, 0);
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omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF,
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OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual);
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OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual,
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0, 0);
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ep->dma_counter = DMA_DEST_LAST(ep->lch);
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UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1);
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@ -820,7 +830,8 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel)
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omap_set_dma_dest_params(ep->lch,
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OMAP_DMA_PORT_TIPB,
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OMAP_DMA_AMODE_CONSTANT,
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(unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
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(unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG),
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0, 0);
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}
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} else {
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status = omap_request_dma(OMAP_DMA_USB_W2FC_RX0 - 1 + channel,
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omap_set_dma_src_params(ep->lch,
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OMAP_DMA_PORT_TIPB,
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OMAP_DMA_AMODE_CONSTANT,
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(unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG));
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(unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG),
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0, 0);
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/* EMIFF */
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omap_set_dma_dest_burst_mode(ep->lch,
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OMAP_DMA_DATA_BURST_4);
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/* channel type P: hw synch (fifo) */
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if (!cpu_is_omap15xx())
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omap_writew(2, OMAP_DMA_LCH_CTRL(ep->lch));
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OMAP1_DMA_LCH_CTRL_REG(ep->lch) = 2;
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}
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just_restart:
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@ -893,7 +905,7 @@ static void dma_channel_release(struct omap_ep *ep)
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else
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req = NULL;
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active = ((1 << 7) & omap_readl(OMAP_DMA_CCR(ep->lch))) != 0;
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active = ((1 << 7) & OMAP_DMA_CCR_REG(ep->lch)) != 0;
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DBG("%s release %s %cxdma%d %p\n", ep->ep.name,
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active ? "active" : "idle",
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@ -1117,7 +1129,7 @@ static int omap_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
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*/
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dma_channel_release(ep);
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dma_channel_claim(ep, channel);
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} else
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} else
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done(ep, req, -ECONNRESET);
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spin_unlock_irqrestore(&ep->udc->lock, flags);
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return 0;
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@ -1153,7 +1165,7 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value)
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/* IN endpoints must already be idle */
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if ((ep->bEndpointAddress & USB_DIR_IN)
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&& !list_empty(&ep->queue)) {
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&& !list_empty(&ep->queue)) {
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status = -EAGAIN;
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goto done;
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}
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@ -1298,6 +1310,23 @@ static void pullup_disable(struct omap_udc *udc)
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UDC_SYSCON1_REG &= ~UDC_PULLUP_EN;
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}
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static struct omap_udc *udc;
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static void omap_udc_enable_clock(int enable)
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{
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if (udc == NULL || udc->dc_clk == NULL || udc->hhc_clk == NULL)
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return;
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if (enable) {
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clk_enable(udc->dc_clk);
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clk_enable(udc->hhc_clk);
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udelay(100);
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} else {
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clk_disable(udc->hhc_clk);
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clk_disable(udc->dc_clk);
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}
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}
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/*
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* Called by whatever detects VBUS sessions: external transceiver
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* driver, or maybe GPIO0 VBUS IRQ. May request 48 MHz clock.
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else
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FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510;
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}
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if (udc->dc_clk != NULL && is_active) {
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if (!udc->clk_requested) {
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omap_udc_enable_clock(1);
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udc->clk_requested = 1;
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}
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}
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if (can_pullup(udc))
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pullup_enable(udc);
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else
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pullup_disable(udc);
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if (udc->dc_clk != NULL && !is_active) {
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if (udc->clk_requested) {
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omap_udc_enable_clock(0);
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udc->clk_requested = 0;
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}
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}
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spin_unlock_irqrestore(&udc->lock, flags);
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return 0;
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}
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@ -1441,7 +1482,7 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src)
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}
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}
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/* IN/OUT packets mean we're in the DATA or STATUS stage.
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/* IN/OUT packets mean we're in the DATA or STATUS stage.
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* This driver uses only uses protocol stalls (ep0 never halts),
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* and if we got this far the gadget driver already had a
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* chance to stall. Tries to be forgiving of host oddities.
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} else if (stat == 0)
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UDC_CTRL_REG = UDC_SET_FIFO_EN;
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UDC_EP_NUM_REG = 0;
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/* activate status stage */
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if (stat == 1) {
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done(ep0, req, 0);
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@ -1866,7 +1907,7 @@ static void pio_out_timer(unsigned long _ep)
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spin_lock_irqsave(&ep->udc->lock, flags);
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if (!list_empty(&ep->queue) && ep->ackwait) {
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use_ep(ep, 0);
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use_ep(ep, UDC_EP_SEL);
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stat_flg = UDC_STAT_FLG_REG;
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if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN)
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@ -1876,12 +1917,12 @@ static void pio_out_timer(unsigned long _ep)
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VDBG("%s: lose, %04x\n", ep->ep.name, stat_flg);
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req = container_of(ep->queue.next,
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struct omap_req, queue);
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UDC_EP_NUM_REG = ep->bEndpointAddress | UDC_EP_SEL;
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(void) read_fifo(ep, req);
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UDC_EP_NUM_REG = ep->bEndpointAddress;
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UDC_CTRL_REG = UDC_SET_FIFO_EN;
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ep->ackwait = 1 + ep->double_buf;
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}
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} else
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deselect_ep();
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}
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mod_timer(&ep->timer, PIO_OUT_TIMEOUT);
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spin_unlock_irqrestore(&ep->udc->lock, flags);
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@ -2028,7 +2069,17 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev)
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/*-------------------------------------------------------------------------*/
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static struct omap_udc *udc;
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static inline int machine_needs_vbus_session(void)
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{
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return (machine_is_omap_innovator()
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|| machine_is_omap_osk()
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|| machine_is_omap_apollon()
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#ifndef CONFIG_MACH_OMAP_H4_OTG
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|| machine_is_omap_h4()
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#endif
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|| machine_is_sx1()
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);
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}
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int usb_gadget_register_driver (struct usb_gadget_driver *driver)
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{
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@ -2070,6 +2121,9 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver)
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udc->gadget.dev.driver = &driver->driver;
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spin_unlock_irqrestore(&udc->lock, flags);
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if (udc->dc_clk != NULL)
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omap_udc_enable_clock(1);
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status = driver->bind (&udc->gadget);
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if (status) {
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DBG("bind to %s --> %d\n", driver->driver.name, status);
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@ -2103,10 +2157,12 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver)
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/* boards that don't have VBUS sensing can't autogate 48MHz;
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* can't enter deep sleep while a gadget driver is active.
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*/
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if (machine_is_omap_innovator() || machine_is_omap_osk())
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if (machine_needs_vbus_session())
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omap_vbus_session(&udc->gadget, 1);
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done:
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if (udc->dc_clk != NULL)
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omap_udc_enable_clock(0);
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return status;
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}
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EXPORT_SYMBOL(usb_gadget_register_driver);
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@ -2121,7 +2177,10 @@ int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
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if (!driver || driver != udc->driver || !driver->unbind)
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return -EINVAL;
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if (machine_is_omap_innovator() || machine_is_omap_osk())
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if (udc->dc_clk != NULL)
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omap_udc_enable_clock(1);
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if (machine_needs_vbus_session())
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omap_vbus_session(&udc->gadget, 0);
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if (udc->transceiver)
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@ -2137,6 +2196,8 @@ int usb_gadget_unregister_driver (struct usb_gadget_driver *driver)
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udc->gadget.dev.driver = NULL;
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udc->driver = NULL;
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if (udc->dc_clk != NULL)
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omap_udc_enable_clock(0);
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DBG("unregistered driver '%s'\n", driver->driver.name);
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return status;
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}
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@ -2219,7 +2280,7 @@ static char *trx_mode(unsigned m, int enabled)
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case 0: return enabled ? "*6wire" : "unused";
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case 1: return "4wire";
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case 2: return "3wire";
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case 3: return "6wire";
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case 3: return "6wire";
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default: return "unknown";
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}
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}
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@ -2228,11 +2289,18 @@ static int proc_otg_show(struct seq_file *s)
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{
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u32 tmp;
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u32 trans;
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char *ctrl_name;
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tmp = OTG_REV_REG;
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trans = USB_TRANSCEIVER_CTRL_REG;
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seq_printf(s, "\nOTG rev %d.%d, transceiver_ctrl %05x\n",
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tmp >> 4, tmp & 0xf, trans);
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if (cpu_is_omap24xx()) {
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ctrl_name = "control_devconf";
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trans = CONTROL_DEVCONF_REG;
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} else {
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ctrl_name = "tranceiver_ctrl";
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trans = USB_TRANSCEIVER_CTRL_REG;
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}
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seq_printf(s, "\nOTG rev %d.%d, %s %05x\n",
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tmp >> 4, tmp & 0xf, ctrl_name, trans);
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tmp = OTG_SYSCON_1_REG;
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seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s,"
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FOURBITS "\n", tmp,
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@ -2307,7 +2375,7 @@ static int proc_udc_show(struct seq_file *s, void *_)
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driver_desc,
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use_dma ? " (dma)" : "");
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tmp = UDC_REV_REG & 0xff;
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tmp = UDC_REV_REG & 0xff;
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seq_printf(s,
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"UDC rev %d.%d, fifo mode %d, gadget %s\n"
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"hmc %d, transceiver %s\n",
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@ -2315,11 +2383,16 @@ static int proc_udc_show(struct seq_file *s, void *_)
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fifo_mode,
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udc->driver ? udc->driver->driver.name : "(none)",
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HMC,
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udc->transceiver ? udc->transceiver->label : "(none)");
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seq_printf(s, "ULPD control %04x req %04x status %04x\n",
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__REG16(ULPD_CLOCK_CTRL),
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__REG16(ULPD_SOFT_REQ),
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__REG16(ULPD_STATUS_REQ));
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udc->transceiver
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? udc->transceiver->label
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: ((cpu_is_omap1710() || cpu_is_omap24xx())
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? "external" : "(none)"));
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if (cpu_class_is_omap1()) {
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seq_printf(s, "ULPD control %04x req %04x status %04x\n",
|
||||
__REG16(ULPD_CLOCK_CTRL),
|
||||
__REG16(ULPD_SOFT_REQ),
|
||||
__REG16(ULPD_STATUS_REQ));
|
||||
}
|
||||
|
||||
/* OTG controller registers */
|
||||
if (!cpu_is_omap15xx())
|
||||
|
@ -2504,9 +2577,10 @@ omap_ep_setup(char *name, u8 addr, u8 type,
|
|||
dbuf = 1;
|
||||
} else {
|
||||
/* double-buffering "not supported" on 15xx,
|
||||
* and ignored for PIO-IN on 16xx
|
||||
* and ignored for PIO-IN on newer chips
|
||||
* (for more reliable behavior)
|
||||
*/
|
||||
if (!use_dma || cpu_is_omap15xx())
|
||||
if (!use_dma || cpu_is_omap15xx() || cpu_is_omap24xx())
|
||||
dbuf = 0;
|
||||
|
||||
switch (maxp) {
|
||||
|
@ -2549,7 +2623,7 @@ omap_ep_setup(char *name, u8 addr, u8 type,
|
|||
ep->bEndpointAddress = addr;
|
||||
ep->bmAttributes = type;
|
||||
ep->double_buf = dbuf;
|
||||
ep->udc = udc;
|
||||
ep->udc = udc;
|
||||
|
||||
ep->ep.name = ep->name;
|
||||
ep->ep.ops = &omap_ep_ops;
|
||||
|
@ -2709,15 +2783,37 @@ static int __init omap_udc_probe(struct platform_device *pdev)
|
|||
struct otg_transceiver *xceiv = NULL;
|
||||
const char *type = NULL;
|
||||
struct omap_usb_config *config = pdev->dev.platform_data;
|
||||
struct clk *dc_clk;
|
||||
struct clk *hhc_clk;
|
||||
|
||||
/* NOTE: "knows" the order of the resources! */
|
||||
if (!request_mem_region(pdev->resource[0].start,
|
||||
if (!request_mem_region(pdev->resource[0].start,
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1,
|
||||
driver_name)) {
|
||||
DBG("request_mem_region failed\n");
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
if (cpu_is_omap16xx()) {
|
||||
dc_clk = clk_get(&pdev->dev, "usb_dc_ck");
|
||||
hhc_clk = clk_get(&pdev->dev, "usb_hhc_ck");
|
||||
BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
|
||||
/* can't use omap_udc_enable_clock yet */
|
||||
clk_enable(dc_clk);
|
||||
clk_enable(hhc_clk);
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
dc_clk = clk_get(&pdev->dev, "usb_fck");
|
||||
hhc_clk = clk_get(&pdev->dev, "usb_l4_ick");
|
||||
BUG_ON(IS_ERR(dc_clk) || IS_ERR(hhc_clk));
|
||||
/* can't use omap_udc_enable_clock yet */
|
||||
clk_enable(dc_clk);
|
||||
clk_enable(hhc_clk);
|
||||
udelay(100);
|
||||
}
|
||||
|
||||
INFO("OMAP UDC rev %d.%d%s\n",
|
||||
UDC_REV_REG >> 4, UDC_REV_REG & 0xf,
|
||||
config->otg ? ", Mini-AB" : "");
|
||||
|
@ -2727,7 +2823,7 @@ static int __init omap_udc_probe(struct platform_device *pdev)
|
|||
hmc = HMC_1510;
|
||||
type = "(unknown)";
|
||||
|
||||
if (machine_is_omap_innovator()) {
|
||||
if (machine_is_omap_innovator() || machine_is_sx1()) {
|
||||
/* just set up software VBUS detect, and then
|
||||
* later rig it so we always report VBUS.
|
||||
* FIXME without really sensing VBUS, we can't
|
||||
|
@ -2756,6 +2852,15 @@ static int __init omap_udc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
hmc = HMC_1610;
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
/* this could be transceiverless in one of the
|
||||
* "we don't need to know" modes.
|
||||
*/
|
||||
type = "external";
|
||||
goto known;
|
||||
}
|
||||
|
||||
switch (hmc) {
|
||||
case 0: /* POWERUP DEFAULT == 0 */
|
||||
case 4:
|
||||
|
@ -2794,6 +2899,7 @@ bad_on_1710:
|
|||
goto cleanup0;
|
||||
}
|
||||
}
|
||||
known:
|
||||
INFO("hmc mode %d, %s transceiver\n", hmc, type);
|
||||
|
||||
/* a "gadget" abstracts/virtualizes the controller */
|
||||
|
@ -2818,8 +2924,8 @@ bad_on_1710:
|
|||
status = request_irq(pdev->resource[1].start, omap_udc_irq,
|
||||
IRQF_SAMPLE_RANDOM, driver_name, udc);
|
||||
if (status != 0) {
|
||||
ERR( "can't get irq %ld, err %d\n",
|
||||
pdev->resource[1].start, status);
|
||||
ERR("can't get irq %d, err %d\n",
|
||||
(int) pdev->resource[1].start, status);
|
||||
goto cleanup1;
|
||||
}
|
||||
|
||||
|
@ -2827,24 +2933,41 @@ bad_on_1710:
|
|||
status = request_irq(pdev->resource[2].start, omap_udc_pio_irq,
|
||||
IRQF_SAMPLE_RANDOM, "omap_udc pio", udc);
|
||||
if (status != 0) {
|
||||
ERR( "can't get irq %ld, err %d\n",
|
||||
pdev->resource[2].start, status);
|
||||
ERR("can't get irq %d, err %d\n",
|
||||
(int) pdev->resource[2].start, status);
|
||||
goto cleanup2;
|
||||
}
|
||||
#ifdef USE_ISO
|
||||
status = request_irq(pdev->resource[3].start, omap_udc_iso_irq,
|
||||
IRQF_DISABLED, "omap_udc iso", udc);
|
||||
if (status != 0) {
|
||||
ERR("can't get irq %ld, err %d\n",
|
||||
pdev->resource[3].start, status);
|
||||
ERR("can't get irq %d, err %d\n",
|
||||
(int) pdev->resource[3].start, status);
|
||||
goto cleanup3;
|
||||
}
|
||||
#endif
|
||||
if (cpu_is_omap16xx()) {
|
||||
udc->dc_clk = dc_clk;
|
||||
udc->hhc_clk = hhc_clk;
|
||||
clk_disable(hhc_clk);
|
||||
clk_disable(dc_clk);
|
||||
}
|
||||
|
||||
if (cpu_is_omap24xx()) {
|
||||
udc->dc_clk = dc_clk;
|
||||
udc->hhc_clk = hhc_clk;
|
||||
/* FIXME OMAP2 don't release hhc & dc clock */
|
||||
#if 0
|
||||
clk_disable(hhc_clk);
|
||||
clk_disable(dc_clk);
|
||||
#endif
|
||||
}
|
||||
|
||||
create_proc_file();
|
||||
device_add(&udc->gadget.dev);
|
||||
return 0;
|
||||
|
||||
status = device_add(&udc->gadget.dev);
|
||||
if (!status)
|
||||
return status;
|
||||
/* If fail, fall through */
|
||||
#ifdef USE_ISO
|
||||
cleanup3:
|
||||
free_irq(pdev->resource[2].start, udc);
|
||||
|
@ -2860,8 +2983,17 @@ cleanup1:
|
|||
cleanup0:
|
||||
if (xceiv)
|
||||
put_device(xceiv->dev);
|
||||
|
||||
if (cpu_is_omap16xx() || cpu_is_omap24xx()) {
|
||||
clk_disable(hhc_clk);
|
||||
clk_disable(dc_clk);
|
||||
clk_put(hhc_clk);
|
||||
clk_put(dc_clk);
|
||||
}
|
||||
|
||||
release_mem_region(pdev->resource[0].start,
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1);
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
|
@ -2891,6 +3023,13 @@ static int __exit omap_udc_remove(struct platform_device *pdev)
|
|||
free_irq(pdev->resource[2].start, udc);
|
||||
free_irq(pdev->resource[1].start, udc);
|
||||
|
||||
if (udc->dc_clk) {
|
||||
if (udc->clk_requested)
|
||||
omap_udc_enable_clock(0);
|
||||
clk_put(udc->hhc_clk);
|
||||
clk_put(udc->dc_clk);
|
||||
}
|
||||
|
||||
release_mem_region(pdev->resource[0].start,
|
||||
pdev->resource[0].end - pdev->resource[0].start + 1);
|
||||
|
||||
|
|
|
@ -175,6 +175,9 @@ struct omap_udc {
|
|||
unsigned ep0_reset_config:1;
|
||||
unsigned ep0_setup:1;
|
||||
struct completion *done;
|
||||
struct clk *dc_clk;
|
||||
struct clk *hhc_clk;
|
||||
unsigned clk_requested:1;
|
||||
};
|
||||
|
||||
/*-------------------------------------------------------------------------*/
|
||||
|
|
Loading…
Reference in New Issue