drm/i915: Add VLV_HDMIB etc. which already include VLV_DISPLAY_BASE
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -3274,7 +3274,9 @@ enum skl_disp_power_wells {
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#define GEN3_SDVOC 0x61160
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#define GEN3_SDVOC 0x61160
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#define GEN4_HDMIB GEN3_SDVOB
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#define GEN4_HDMIB GEN3_SDVOB
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#define GEN4_HDMIC GEN3_SDVOC
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#define GEN4_HDMIC GEN3_SDVOC
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#define CHV_HDMID 0x6116C
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#define VLV_HDMIB (VLV_DISPLAY_BASE + GEN4_HDMIB)
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#define VLV_HDMIC (VLV_DISPLAY_BASE + GEN4_HDMIC)
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#define CHV_HDMID (VLV_DISPLAY_BASE + 0x6116C)
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#define PCH_SDVOB 0xe1140
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#define PCH_SDVOB 0xe1140
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#define PCH_HDMIB PCH_SDVOB
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#define PCH_HDMIB PCH_SDVOB
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#define PCH_HDMIC 0xe1150
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#define PCH_HDMIC 0xe1150
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@ -4103,6 +4105,10 @@ enum skl_disp_power_wells {
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#define DP_C 0x64200
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#define DP_C 0x64200
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#define DP_D 0x64300
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#define DP_D 0x64300
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#define VLV_DP_B (VLV_DISPLAY_BASE + DP_B)
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#define VLV_DP_C (VLV_DISPLAY_BASE + DP_C)
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#define CHV_DP_D (VLV_DISPLAY_BASE + DP_D)
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#define DP_PORT_EN (1 << 31)
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#define DP_PORT_EN (1 << 31)
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#define DP_PIPEB_SELECT (1 << 30)
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#define DP_PIPEB_SELECT (1 << 30)
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#define DP_PIPE_MASK (1 << 30)
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#define DP_PIPE_MASK (1 << 30)
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@ -14050,29 +14050,26 @@ static void intel_setup_outputs(struct drm_device *dev)
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* eDP ports. Consult the VBT as well as DP_DETECTED to
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* eDP ports. Consult the VBT as well as DP_DETECTED to
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* detect eDP ports.
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* detect eDP ports.
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*/
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*/
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if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIB) & SDVO_DETECTED &&
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if (I915_READ(VLV_HDMIB) & SDVO_DETECTED &&
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!intel_dp_is_edp(dev, PORT_B))
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!intel_dp_is_edp(dev, PORT_B))
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intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIB,
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intel_hdmi_init(dev, VLV_HDMIB, PORT_B);
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PORT_B);
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if (I915_READ(VLV_DP_B) & DP_DETECTED ||
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if (I915_READ(VLV_DISPLAY_BASE + DP_B) & DP_DETECTED ||
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intel_dp_is_edp(dev, PORT_B))
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intel_dp_is_edp(dev, PORT_B))
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intel_dp_init(dev, VLV_DISPLAY_BASE + DP_B, PORT_B);
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intel_dp_init(dev, VLV_DP_B, PORT_B);
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if (I915_READ(VLV_DISPLAY_BASE + GEN4_HDMIC) & SDVO_DETECTED &&
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if (I915_READ(VLV_HDMIC) & SDVO_DETECTED &&
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!intel_dp_is_edp(dev, PORT_C))
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!intel_dp_is_edp(dev, PORT_C))
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intel_hdmi_init(dev, VLV_DISPLAY_BASE + GEN4_HDMIC,
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intel_hdmi_init(dev, VLV_HDMIC, PORT_C);
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PORT_C);
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if (I915_READ(VLV_DP_C) & DP_DETECTED ||
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if (I915_READ(VLV_DISPLAY_BASE + DP_C) & DP_DETECTED ||
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intel_dp_is_edp(dev, PORT_C))
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intel_dp_is_edp(dev, PORT_C))
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intel_dp_init(dev, VLV_DISPLAY_BASE + DP_C, PORT_C);
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intel_dp_init(dev, VLV_DP_C, PORT_C);
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if (IS_CHERRYVIEW(dev)) {
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if (IS_CHERRYVIEW(dev)) {
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if (I915_READ(VLV_DISPLAY_BASE + CHV_HDMID) & SDVO_DETECTED)
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intel_hdmi_init(dev, VLV_DISPLAY_BASE + CHV_HDMID,
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PORT_D);
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/* eDP not supported on port D, so don't check VBT */
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/* eDP not supported on port D, so don't check VBT */
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if (I915_READ(VLV_DISPLAY_BASE + DP_D) & DP_DETECTED)
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if (I915_READ(CHV_HDMID) & SDVO_DETECTED)
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intel_dp_init(dev, VLV_DISPLAY_BASE + DP_D, PORT_D);
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intel_hdmi_init(dev, CHV_HDMID, PORT_D);
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if (I915_READ(CHV_DP_D) & DP_DETECTED)
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intel_dp_init(dev, CHV_DP_D, PORT_D);
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}
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}
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intel_dsi_init(dev);
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intel_dsi_init(dev);
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