mlx4_core: Add helper functions to support MR re-registration
Add few helper functions to support a mechanism of getting an MPT, modifying it and updating the HCA with the modified object. The code takes 2 paths, one for directly changing the MPT (and sometimes its related MTTs) and another one which queries the MPT and updates the HCA via fw command SW2HW_MPT. The first path is used in native mode; the second path is slower and is used only in SRIOV. Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Matan Barak <matanb@mellanox.com> Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
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@ -279,6 +279,8 @@ struct mlx4_icm_table {
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#define MLX4_MPT_FLAG_PHYSICAL (1 << 9)
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#define MLX4_MPT_FLAG_REGION (1 << 8)
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#define MLX4_MPT_PD_MASK (0x1FFFFUL)
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#define MLX4_MPT_PD_VF_MASK (0xFE0000UL)
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#define MLX4_MPT_PD_FLAG_FAST_REG (1 << 27)
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#define MLX4_MPT_PD_FLAG_RAE (1 << 28)
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#define MLX4_MPT_PD_FLAG_EN_INV (3 << 24)
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@ -298,6 +298,131 @@ static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox
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MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
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}
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int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
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struct mlx4_mpt_entry ***mpt_entry)
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{
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int err;
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int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1);
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struct mlx4_cmd_mailbox *mailbox = NULL;
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/* Make sure that at this point we have single-threaded access only */
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if (mmr->enabled != MLX4_MPT_EN_HW)
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return -EINVAL;
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err = mlx4_HW2SW_MPT(dev, NULL, key);
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if (err) {
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mlx4_warn(dev, "HW2SW_MPT failed (%d).", err);
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mlx4_warn(dev, "Most likely the MR has MWs bound to it.\n");
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return err;
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}
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mmr->enabled = MLX4_MPT_EN_SW;
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if (!mlx4_is_mfunc(dev)) {
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**mpt_entry = mlx4_table_find(
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&mlx4_priv(dev)->mr_table.dmpt_table,
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key, NULL);
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} else {
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR_OR_NULL(mailbox))
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return PTR_ERR(mailbox);
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err = mlx4_cmd_box(dev, 0, mailbox->dma, key,
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0, MLX4_CMD_QUERY_MPT,
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MLX4_CMD_TIME_CLASS_B,
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MLX4_CMD_WRAPPED);
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if (err)
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goto free_mailbox;
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*mpt_entry = (struct mlx4_mpt_entry **)&mailbox->buf;
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}
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if (!(*mpt_entry) || !(**mpt_entry)) {
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err = -ENOMEM;
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goto free_mailbox;
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}
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return 0;
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free_mailbox:
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_hw_get_mpt);
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int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
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struct mlx4_mpt_entry **mpt_entry)
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{
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int err;
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if (!mlx4_is_mfunc(dev)) {
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/* Make sure any changes to this entry are flushed */
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wmb();
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*(u8 *)(*mpt_entry) = MLX4_MPT_STATUS_HW;
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/* Make sure the new status is written */
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wmb();
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err = mlx4_SYNC_TPT(dev);
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} else {
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int key = key_to_hw_index(mmr->key) & (dev->caps.num_mpts - 1);
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struct mlx4_cmd_mailbox *mailbox =
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container_of((void *)mpt_entry, struct mlx4_cmd_mailbox,
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buf);
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err = mlx4_SW2HW_MPT(dev, mailbox, key);
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}
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mmr->pd = be32_to_cpu((*mpt_entry)->pd_flags) & MLX4_MPT_PD_MASK;
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if (!err)
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mmr->enabled = MLX4_MPT_EN_HW;
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return err;
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_hw_write_mpt);
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void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev,
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struct mlx4_mpt_entry **mpt_entry)
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{
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if (mlx4_is_mfunc(dev)) {
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struct mlx4_cmd_mailbox *mailbox =
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container_of((void *)mpt_entry, struct mlx4_cmd_mailbox,
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buf);
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mlx4_free_cmd_mailbox(dev, mailbox);
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}
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_hw_put_mpt);
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int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry,
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u32 pdn)
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{
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u32 pd_flags = be32_to_cpu(mpt_entry->pd_flags);
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/* The wrapper function will put the slave's id here */
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if (mlx4_is_mfunc(dev))
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pd_flags &= ~MLX4_MPT_PD_VF_MASK;
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mpt_entry->pd_flags = cpu_to_be32((pd_flags & ~MLX4_MPT_PD_MASK) |
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(pdn & MLX4_MPT_PD_MASK)
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| MLX4_MPT_PD_FLAG_EN_INV);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_hw_change_pd);
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int mlx4_mr_hw_change_access(struct mlx4_dev *dev,
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struct mlx4_mpt_entry *mpt_entry,
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u32 access)
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{
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u32 flags = (be32_to_cpu(mpt_entry->flags) & ~MLX4_PERM_MASK) |
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(access & MLX4_PERM_MASK);
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mpt_entry->flags = cpu_to_be32(flags);
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_hw_change_access);
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static int mlx4_mr_alloc_reserved(struct mlx4_dev *dev, u32 mridx, u32 pd,
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u64 iova, u64 size, u32 access, int npages,
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int page_shift, struct mlx4_mr *mr)
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@ -463,6 +588,41 @@ int mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr)
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_free);
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void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr)
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{
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mlx4_mtt_cleanup(dev, &mr->mtt);
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_rereg_mem_cleanup);
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int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr,
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u64 iova, u64 size, int npages,
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int page_shift, struct mlx4_mpt_entry *mpt_entry)
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{
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int err;
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mpt_entry->start = cpu_to_be64(mr->iova);
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mpt_entry->length = cpu_to_be64(mr->size);
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mpt_entry->entity_size = cpu_to_be32(mr->mtt.page_shift);
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err = mlx4_mtt_init(dev, npages, page_shift, &mr->mtt);
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if (err)
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return err;
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if (mr->mtt.order < 0) {
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mpt_entry->flags |= cpu_to_be32(MLX4_MPT_FLAG_PHYSICAL);
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mpt_entry->mtt_addr = 0;
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} else {
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mpt_entry->mtt_addr = cpu_to_be64(mlx4_mtt_addr(dev,
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&mr->mtt));
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if (mr->mtt.page_shift == 0)
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mpt_entry->mtt_sz = cpu_to_be32(1 << mr->mtt.order);
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}
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mr->enabled = MLX4_MPT_EN_SW;
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return 0;
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}
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EXPORT_SYMBOL_GPL(mlx4_mr_rereg_mem_write);
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int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr)
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{
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struct mlx4_cmd_mailbox *mailbox;
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@ -2613,12 +2613,34 @@ int mlx4_QUERY_MPT_wrapper(struct mlx4_dev *dev, int slave,
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if (err)
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return err;
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if (mpt->com.from_state != RES_MPT_HW) {
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if (mpt->com.from_state == RES_MPT_MAPPED) {
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/* In order to allow rereg in SRIOV, we need to alter the MPT entry. To do
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* that, the VF must read the MPT. But since the MPT entry memory is not
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* in the VF's virtual memory space, it must use QUERY_MPT to obtain the
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* entry contents. To guarantee that the MPT cannot be changed, the driver
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* must perform HW2SW_MPT before this query and return the MPT entry to HW
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* ownership fofollowing the change. The change here allows the VF to
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* perform QUERY_MPT also when the entry is in SW ownership.
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*/
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struct mlx4_mpt_entry *mpt_entry = mlx4_table_find(
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&mlx4_priv(dev)->mr_table.dmpt_table,
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mpt->key, NULL);
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if (NULL == mpt_entry || NULL == outbox->buf) {
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err = -EINVAL;
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goto out;
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}
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memcpy(outbox->buf, mpt_entry, sizeof(*mpt_entry));
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err = 0;
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} else if (mpt->com.from_state == RES_MPT_HW) {
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err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
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} else {
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err = -EBUSY;
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goto out;
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}
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err = mlx4_DMA_wrapper(dev, slave, vhcr, inbox, outbox, cmd);
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out:
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put_res(dev, slave, id, RES_MPT);
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@ -262,6 +262,7 @@ enum {
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MLX4_PERM_REMOTE_WRITE = 1 << 13,
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MLX4_PERM_ATOMIC = 1 << 14,
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MLX4_PERM_BIND_MW = 1 << 15,
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MLX4_PERM_MASK = 0xFC00
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};
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enum {
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@ -1243,4 +1244,19 @@ int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port);
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int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port);
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int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port,
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int enable);
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int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
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struct mlx4_mpt_entry ***mpt_entry);
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int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr,
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struct mlx4_mpt_entry **mpt_entry);
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int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry,
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u32 pdn);
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int mlx4_mr_hw_change_access(struct mlx4_dev *dev,
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struct mlx4_mpt_entry *mpt_entry,
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u32 access);
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void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev,
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struct mlx4_mpt_entry **mpt_entry);
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void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr);
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int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr,
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u64 iova, u64 size, int npages,
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int page_shift, struct mlx4_mpt_entry *mpt_entry);
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#endif /* MLX4_DEVICE_H */
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