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ARM: dts: sunxi: h3-h5: Move pinctrl of mmc1 from dts to dtsi 

Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.

Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
This commit is contained in:
Joonas Kylmälä 2018-02-08 14:01:40 +02:00 committed by Maxime Ripard
parent 50caa75681
commit e607b605be
No known key found for this signature in database
GPG Key ID: D2B4C094214DAF74
13 changed files with 2 additions and 24 deletions
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2
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts
View File

@ -72,8 +72,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;

2
arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts
View File

@ -119,8 +119,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc_wifi>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;

2
arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts
View File

@ -143,8 +143,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;

2
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
View File

@ -122,8 +122,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;

2
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts
View File

@ -101,8 +101,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;

2
arch/arm/boot/dts/sun8i-h3-nanopi-neo-air.dts
View File

@ -87,8 +87,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;

2
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts
View File

@ -139,8 +139,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;

2
arch/arm/boot/dts/sun8i-h3-orangepi-lite.dts
View File

@ -113,8 +113,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;

2
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts
View File

@ -59,8 +59,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
non-removable;

2
arch/arm/boot/dts/sunxi-h3-h5.dtsi
View File

@ -154,6 +154,8 @@
mmc1: mmc@1c10000 {
/* compatible and clocks are in per SoC .dtsi file */
reg = <0x01c10000 0x1000>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
resets = <&ccu RST_BUS_MMC1>;
reset-names = "ahb";
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;

2
arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo-plus2.dts
View File

@ -158,8 +158,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;

2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-prime.dts
View File

@ -174,8 +174,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;

2
arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-zero-plus2.dts
View File

@ -81,8 +81,6 @@
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
vqmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&wifi_pwrseq>;