drm/radeon: split evergreen_cs_check_reg
evergreen_cs_check_reg() is a large function and gcc doesn't want to inline it. It has a quick check for reg_safe_bm[] to see if register needs special handling, which often results in early exit. However because the function is large, it has a long prologue/epilogue to save/restore all the callee-save registers which according to perf is taking significant amount of time. To avoid this, we can reuse evergreen_is_safe_reg() to do the early check directly in register loop. Reviewed-by: Dave Airlie <airlied@redhat.com> Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1086,30 +1086,18 @@ static int evergreen_cs_parse_packet0(struct radeon_cs_parser *p,
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}
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/**
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* evergreen_cs_check_reg() - check if register is authorized or not
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* evergreen_cs_handle_reg() - process registers that need special handling.
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* @parser: parser structure holding parsing context
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* @reg: register we are testing
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* @idx: index into the cs buffer
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*
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* This function will test against evergreen_reg_safe_bm and return 0
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* if register is safe. If register is not flag as safe this function
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* will test it against a list of register needind special handling.
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*/
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static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
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static int evergreen_cs_handle_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
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{
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struct evergreen_cs_track *track = (struct evergreen_cs_track *)p->track;
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struct radeon_bo_list *reloc;
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u32 m, i, tmp, *ib;
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u32 tmp, *ib;
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int r;
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i = (reg >> 7);
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if (unlikely(i >= REG_SAFE_BM_SIZE)) {
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dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
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return -EINVAL;
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}
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m = 1 << ((reg >> 2) & 31);
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if (!(track->reg_safe_bm[i] & m))
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return 0;
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ib = p->ib.ptr;
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switch (reg) {
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/* force following reg to 0 in an attempt to disable out buffer
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@ -1756,20 +1744,27 @@ static int evergreen_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
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return 0;
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}
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static bool evergreen_is_safe_reg(struct radeon_cs_parser *p, u32 reg, u32 idx)
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/**
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* evergreen_is_safe_reg() - check if register is authorized or not
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* @parser: parser structure holding parsing context
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* @reg: register we are testing
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*
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* This function will test against reg_safe_bm and return true
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* if register is safe or false otherwise.
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*/
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static inline bool evergreen_is_safe_reg(struct radeon_cs_parser *p, u32 reg)
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{
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struct evergreen_cs_track *track = p->track;
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u32 m, i;
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i = (reg >> 7);
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if (unlikely(i >= REG_SAFE_BM_SIZE)) {
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dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
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return false;
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}
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m = 1 << ((reg >> 2) & 31);
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if (!(track->reg_safe_bm[i] & m))
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return true;
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dev_warn(p->dev, "forbidden register 0x%08x at %d\n", reg, idx);
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return false;
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}
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@ -2306,7 +2301,9 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
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}
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for (i = 0; i < pkt->count; i++) {
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reg = start_reg + (4 * i);
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r = evergreen_cs_check_reg(p, reg, idx+1+i);
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if (evergreen_is_safe_reg(p, reg))
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continue;
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r = evergreen_cs_handle_reg(p, reg, idx + 1 + i);
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if (r)
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return r;
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}
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@ -2322,7 +2319,9 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
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}
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for (i = 0; i < pkt->count; i++) {
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reg = start_reg + (4 * i);
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r = evergreen_cs_check_reg(p, reg, idx+1+i);
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if (evergreen_is_safe_reg(p, reg))
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continue;
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r = evergreen_cs_handle_reg(p, reg, idx + 1 + i);
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if (r)
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return r;
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}
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@ -2577,8 +2576,11 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
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} else {
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/* SRC is a reg. */
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reg = radeon_get_ib_value(p, idx+1) << 2;
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if (!evergreen_is_safe_reg(p, reg, idx+1))
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if (!evergreen_is_safe_reg(p, reg)) {
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dev_warn(p->dev, "forbidden register 0x%08x at %d\n",
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reg, idx + 1);
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return -EINVAL;
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}
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}
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if (idx_value & 0x2) {
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u64 offset;
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@ -2601,8 +2603,11 @@ static int evergreen_packet3_check(struct radeon_cs_parser *p,
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} else {
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/* DST is a reg. */
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reg = radeon_get_ib_value(p, idx+3) << 2;
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if (!evergreen_is_safe_reg(p, reg, idx+3))
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if (!evergreen_is_safe_reg(p, reg)) {
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dev_warn(p->dev, "forbidden register 0x%08x at %d\n",
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reg, idx + 3);
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return -EINVAL;
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}
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}
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break;
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case PACKET3_NOP:
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