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clk: renesas: r8a77965: Add SATA clock 

This patch adds SATA clock to the R8A77965 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
[wsa: rebased to upstream base]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Takeshi Kihara 2018-07-25 21:14:17 +02:00 committed by Geert Uytterhoeven
parent f3824deb46
commit e59bb7be47
1 changed files with 1 additions and 0 deletions
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drivers/clk/renesas/r8a77965-cpg-mssr.c
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@ -193,6 +193,7 @@ static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
DEF_MOD("vin1", 810, R8A77965_CLK_S0D2),
DEF_MOD("vin0", 811, R8A77965_CLK_S0D2),
DEF_MOD("etheravb", 812, R8A77965_CLK_S0D6),
DEF_MOD("sata0", 815, R8A77965_CLK_S3D2),
DEF_MOD("imr1", 822, R8A77965_CLK_S0D2),
DEF_MOD("imr0", 823, R8A77965_CLK_S0D2),